Functional Description
Timing Mode 1 (SPM = 1)
Timing mode 1 (SPM = 1) is only meaningful in exchange applications (LT-S, LT-T) when the
SLD is used.
In timing mode 1 the SLD operates in slave mode and the SSI (Serial Port A) is no longer
available.
The IOM is synchronized by a frame signal FSD delayed in time respect to the frame sync
pulse input via FSC1. This reduces the B-channel round-trip delay time when the SLD is used
(figure 15).
For correct operation in timing mode 1, the output FSD should be connected to the FSC2 input
(see figures 11 and 15).
R
IOM
SLD
IDP1
IDP0
DCL
R
ISAC R -S
IOM
LT-T, LT-S Mode
Timing Mode 1
Compatible
Controller
SLD (Syst.)
FSC (Syst.)
SIP
FSC1
FSC2
FSD
CLK (Syst.)
1/8 Frame Period
IDP1: = 256 kbit/s
FSC1 (System)
IDP0: = 256 kbit/s
DCL: = 512 kbit/s
FSC: = 8 kHz
R
FSC2 (IOM
)
ITS02328
Figure 15
IOM®-1 Interface Signals/Timing Mode 1
Semiconductor Group
42
INFINEON [ Infineon ]
