Low Level Controller
pt->pt_rx_frame = PT_FR_TR;
ctrl = 0x00L;
break;
case PT_MD_EXT_TRANSP:
/* no address recognition, SAPI
*/
/* and TEI are the first two bytes */
/* of data
*/
if (pt->pt_rx_cnt > 0)
pt->pt_rx_cnt--;
sapi = *ptr++;
case PT_MD_TRANSP:
/* high byte address recognition,
/* TEI is the first byte read
*/
*/
if (pt->pt_rx_cnt < 2)
frame_status = MUTILATED;
else
pt->pt_rx_cnt -= 2;
/* read TEI and control field
*/
tei
= *ptr++;
ctrl = (WORD) *ptr++;
if (pt->pt_op_mode == PT_MD_TRANSP)
pei |= 0x20;
else
pei |= 0x30;
break;
case PT_MD_AUTO:
case PT_MD_NON_AUTO:
/* full address recognition in
/* AUTO/nonAUTOMODE read only the
/* HDLC control field information
*/
*/
*/
if (pt->pt_op_mode == PT_MD_AUTO)
/* AUTOMODE link ???
*/
AutoM = ((rsta & 0x0D) == 0x09) ? TRUE : FALSE;
if (!AutoM)
pei |= 0x10;
/* the (first byte of the) control */
/* field is in register RHCR
ctrl = (WORD) inp (pt->pt_r_rhcr);
break;
*/
}
switch (ctrl & 0x03)
{
/* determine the frame type
/* ========================
/* *** HDLC U frame **
*/
*/
*/
case 0x3:
Two = FALSE;
/* one byte control field !
*/
if (pt->pt_rx_cnt == 0)
{
pt->pt_rx_frame = PT_FR_U;
break;
Semiconductor Group
303
INFINEON [ Infineon ]
