Low Level Controller
outp (pt->pt_r_sap1, sapi);
return (ACK_DONE);
/***************************************************************************/
}
}
/*
/*
/*
/*
/*
/*
/*
*/
*/
*/
*/
*/
*/
*/
Function: RecReady_ICC ()
Parms : pei, ready
purpose : set HDLC receiver ready
not ready (’ready’= 0)
To be used in auto mode only
(’ready’= 1)
/***************************************************************************/
EXPORT int
RecReady_ICC (pei, ready)
BYTE
pei, ready;
{
register PEITAB
*pt;
if (!(pt = GetPeitab_BASIC (pei)))
return (ACK_NOT_SUPPORTED);
outp (pt->pt_r_cmdr, (BYTE) (ready ? 0x00 : CMDR_RNR));
return (ACK_DONE);
}
/***************************************************************************/
/*
/*
/*
/*
/*
*/
*/
*/
*/
*/
Function: ResetHDLC_ICC ()
Parms : pei
purpose : reset HDLC controller
/***************************************************************************/
EXPORT int
ResetHDLC_ICC (pei)
BYTE
pei;
{
register PEITAB
*pt;
if (!(pt = GetPeitab_BASIC (pei)))
return (ACK_NOT_SUPPORTED);
outp (pt->pt_r_mask, 0xFF);
/* clear receive and transmit
/* paths, i.e. clear the status
/* variables indicating any
/* transmission or reception of
/* frames and release the MMU
/* buffers
*/
*/
*/
*/
*/
*/
FREE_TX_PATH (pt->pt_pei);
if (pt->pt_rx_start)
{
MMU_free (pt->pt_rx_start);
pt->pt_rx_start
= NULL_PTR;
Semiconductor Group
291
INFINEON [ Infineon ]
