Low Level Controller
pt->pt_state
pt->pt_rx_frame
pt->pt_rx_cnt
&= ~PT_REC_ACTIVE;
= 0x00;
= 0;
}
pt->pt_state
&= ~PT_REC_ACTIVE;
/* set the reset flag in the state */
/* variable. This allows the
/* interrupt service routine to
*/
*/
/* react correctly on the following */
/* XPR interrupt
*/
*/
pt->pt_state |= PT_HDLC_RESET;
/* the reset commands:
/* - receive message complete (RME) */
/* - reset hdlc receiver
/* - transmitter reset
(RHR) */
(XRES)*/
outp (pt->pt_r_cmdr, CMDR_RMC | CMDR_RHR | CMDR_XRES);
if (pt->pt_op_mode == PT_MD_AUTO) /* write TIMR register to stop the */
/* internal timer in automode
outp (pt->pt_r_timr, inp(pt->pt_r_timr));
*/
*/
outp (pt->pt_r_mask, 0);
return (ACK_DONE);
/* now allow all interrupts again
}
/***************************************************************************/
/*
/*
/*
/*
/*
/*
/*
/*
/*
*/
*/
*/
*/
*/
*/
*/
*/
*/
Function:
Parms
SendFrame_ICC ()
’pei’
’frame_type’ specifying the frame
:
’cnt’
number of bytes to send
’frame_ptr’ pointer to the data bytes
purpose :
Initiate transmission of HDLC frames ( S, U, I, UI )
/***************************************************************************/
EXPORT int
SendFrame_ICC (pei, frame_type, cnt, frame_ptr)
BYTE
WORD
FPTR
pei, frame_type;
cnt;
frame_ptr;
{
register PEITAB
BYTE
*pt;
cmd;
if (!(pt = GetPeitab_BASIC (pei)))
return (ACK_NOT_SUPPORTED);
/* return if XFIFO is not write
/* enable
*/
*/
if (!(inp (pt->pt_r_star) & 0x40))
return (ACK_ACCESS_FAULT);
/* return if transmit path still
/* blocked and not in automode
*/
*/
Semiconductor Group
292
INFINEON [ Infineon ]
