F3 PWM controller
ICE3BS03LJG
Functional Description
Blanking is integrated in the current sense path for the induced to the delay, which depends on the ratio of dI/
comparators C10, C12 and the PWM-OP.
dt of the peak current (see Figure 19).
The output of comparator C12 is activated by the AND The overshoot of Signal2 is larger than of Signal1 due
Gate G10 if Active Burst Mode is entered. When it is to the steeper rising waveform. This change in the
activated, the current limiting is reduced to 0.25V. This slope is depending on the AC input voltage.
voltage level determines the maximum power level in Propagation Delay Compensation is integrated to
Active Burst Mode.
reduce the overshoot due to dI/dt of the rising primary
current. Thus the propagation delay time between
exceeding the current sense threshold Vcsth and the
switching off of the external power MOSFET is
compensated over temperature within a wide range.
Current Limiting is then very accurate.
Furthermore, the comparator C11 is implemented to
detect dangerous current levels which could occur if
there is a short winding in the transformer or the
secondary diode is shorten. To ensure that there is no
accidentally entering of the Latched Mode by the
comparator C11, a 190ns spike blanking time is For example, Ipeak = 0.5A with RSense = 2. The current
integrated in the output path of comparator C11.
sense threshold is set to a static voltage level Vcsth=1V
without Propagation Delay Compensation. A current
ramp of dI/dt = 0.4A/µs, or dVSense/dt = 0.8V/µs, and a
propagation delay time of tPropagation Delay =180ns leads
to an Ipeak overshoot of 14.4%. With the propagation
delay compensation, the overshoot is only around 2%
(see Figure 20).
3.6.1
VSense
Leading Edge Blanking
Vcsth
tLEB = 220ns
with compensation
without compensation
V
1,3
1,25
1,2
t
1,15
1,1
Figure 18
Leading Edge Blanking
1,05
1
Whenever the power MOSFET is switched on, a
leading edge spike is generated due to the primary-
side capacitances and reverse recovery time of the
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked out with a time constant of tLEB = 220ns.
0,95
0,9
0
0,2
0,4
0,6
0,8
1
1,2
1,4
1,6
1,8
2
V
dVSense
dt
µs
Figure 20
Overcurrent Shutdown
3.6.2
Propagation Delay Compensation
Signal2 Signal1
VOSC
max. Duty Cycle
ISense
tPropagation Delay
IOvershoot2
Ipeak2
Ipeak1
ILimit
off time
VSense
t
Propagation Delay
IOvershoot1
Vcsth
t
Signal1
Signal2
Figure 19
Current Limiting
t
In case of overcurrent detection, there is always
propagation delay to switch off the external power
MOSFET. An overshoot of the peak current Ipeak is
Figure 21
Dynamic Voltage Threshold Vcsth
Version 2.0
13
6 Dec 2007
INFINEON [ Infineon ]
