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BTS3080TF 参数 Datasheet PDF下载

BTS3080TF图片预览
型号: BTS3080TF
PDF下载: 下载PDF文件 查看货源
内容描述: [BTS3080TF 是一款 80 mΩ 智能单通道低边电源开关,采用 PG-T0252-3 封装,提供嵌入式保护功能。功率晶体管由 N 通道垂直功率MOSFET 构成。]
分类和应用: 开关驱动电源开关接口集成电路晶体管
文件页数/大小: 39 页 / 1119 K
品牌: INFINEON [ Infineon ]
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HITFET - BTS3080TF  
Smart Low-Side Power Switch  
General Product Characteristics  
1) Not subject to production test, specified by design  
Note:  
Within the functional range the IC operates as described in the circuit description. The electrical  
characteristics are specified within the conditions given in the related electrical characteristics  
table.  
4.3  
Thermal Resistance  
Note:  
This thermal data was generated in accordance with JEDEC JESD51 standards.  
For more information, go to www.jedec.org.  
Table 4  
Thermal Resistance PG-TO252-3  
Parameter  
Symbol  
Values  
Unit Note or  
Test Condition  
Number  
Min. Typ. Max.  
1) 2)  
1) 3)  
1) 4)  
Junction to Soldering Point  
Junction to Ambient (2s2p)  
RthJSP  
3.7  
27  
41  
K/W  
K/W  
K/W  
P_4.3.3  
P_4.3.7  
P_4.3.11  
RthJA(2s2p)  
RthJA(1s0p)  
Junction to Ambient  
(1s0p+600 mm2 Cu)  
1) Not subject to production test, specified by design  
2) Specified RthJSPvalue is simulated at natural convection on a cold plate setup (all pins are fixed to ambient  
temperature).  
TA = 85°C. Device is loaded with 1 W power.  
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board;  
The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu,  
2 x 35 µm Cu). Where applicable a thermal via array under the ex posed pad contacted the first inner copper layer.  
TA = 85°C, Device is loaded with 1 W power.  
4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board;  
The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper  
area of 600 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power.  
4.3.1  
PCB set up  
The following PCB set up was implemented to determine the transient thermal impedance1)  
70µm modelled (traces)  
35µm, 100% metalization*  
70µm, 5% metalization*  
Figure 4  
Cross section JEDEC2s2p  
1) (*) means percentual Cu metalization on each layer  
Datasheet  
8
Rev. 1.0  
2016-06-01  
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