ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Auto-Negotiation Fast Link Pulse Timing
The table below lists the significant time periods for the ICS1894-40 Auto-Negotiation Fast Link Pulse. The time
periods consist of timings of signals on the following pins:
• TP_TXP
• TP_TXN
The Auto-Negotiation Fast Link Pulse Timing Diagram shows the timing diagram for one pair of these differential
signals, for example TP_TXP minus TP_TXN.
Time
Parameter
Conditions Min. Typ. Max. Units
Period
t1
t2
t3
t4
t5
t6
Clock/Data Pulse Width
–
–
–
–
–
–
–
55
110
–
90
60
125
5
–
70
140
–
ns
μs
Clock Pulse-to-Data Pulse Timing
Clock Pulse-to-Clock Pulse Timing
Fast Link Pulse Burst Width
μs
ms
Fast Link Pulse Burst to Fast Link Pulse Burst
Number of Clock/Data Pulses in a Burst
10
15
15
20
25
30
ms
pulses
Auto-Negotiation Fast Link Pulse Timing Diagram
Clock
Pulse
Data
Pulse
Clock
Pulse
Differential
Twisted Pair
Transmit Signal
t2
t1
t1
t3
FLP Burst
FLP Burst
Differential
Twisted Pair
Transmit Signal
t4
t5
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
50
ICS1894-40
REV G 060110
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
