ICS1892
TSD
Chapter 8 Management Register Set
10Base-T/100BIaCseS-TX1I8nt9eg2rated PHYceiver™
8.13 Register 18: 10Base-T Operations Register
The 10Base-T Operations Register provides an STA with the ability to monitor and control the ICS1892
activity while the ICS1892 is operating in 10Base-T mode.
Note:
1. For an explanation of acronyms used in Table 8-20, see Chapter 1, “Abbreviations and Acronyms”.
2. During any write operation to any bit in this register, the STA must write the default value to all
Reserved bits.
Table 8-20. 10Base-T Operations Register (register 18 [0x12])
Bit
Definition
When Bit = 0
When Bit = 1
Ac-
SF
De- Hex
cess
fault
18.15 ICS reserved
18.14 Polarity reversed
18.13 ICS reserved
18.12 ICS reserved
18.11 ICS reserved
18.10 ICS reserved
Read unspecified
Normal polarity
Read unspecified
Polarity reversed
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Jabber Check disabled
Read unspecified
RW/0
RO
SC
LH
–
0
–
–
–
0
0
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Normal Jabber behavior
Read unspecified
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW
–
–
–
–
–
–
–
18.9
18.8
18.7
18.6
18.5
18.4
18.3
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
–
–
–
–
–
–
–
–
–
0
RW/1
RW
–
1
Auto polarity inhibit Polarity automatically
corrected
Polarity not automatically
corrected
–
0
18.2
18.1
18.0
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Normal SQE test behavior SQE test disabled
RW
RW
RW
–
–
–
0
0
0
Normal Link Loss behavior Link Always = Link Pass
Normal squelch behavior
No squelch
8.13.1 ICS Reserved (bit 18.15)
ICS reserves this bit for future use. Functionally, this bit is equivalent to an IEEE Reserved bit. When this
reserved bits is:
• Read by an STA, the ICS1892 returns a logic zero.
• Written to by an STA, the STA must use the default value specified in this data sheet.
In general, ICS uses some reserved bits to invoke auxiliary functions. To ensure proper operation of the
ICS1892, an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA
always write the default value of any reserved bits during all management register write operations.
ICS1892, Rev. D, 2/26/01
February 26, 2001
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
95
IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™
ICS1892
95
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
