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1892Y-14 参数 Datasheet PDF下载

1892Y-14图片预览
型号: 1892Y-14
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP64]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 148 页 / 1762 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS1892  
TSD  
10Base-T/100Base-TXIntegrated PHYceiver™  
6.4 Link Pulse Interface  
The Link Pulse Interface allows an application to control each step in the auto-negotiation process except  
for the actual generation and reception of 10Base-T link pulses (that is, Normal Link Pulses). The ICS1892  
MAC/Repeater Interface can be configured as a Link Pulse Interface as determined by ICS1892  
configuration functions.  
The Link Pulse Interface is selected as follows:  
The HW/SW pin must be set for the hardware setting (logic low).  
The MII/SI input pin must be set for the Symbol/Serial Interface (logic high).  
The 10/LP input pin must be set for Link Pulse mode (logic high).  
The 10/100SEL input pin must be set for 100M operations (logic high).  
Although the 10/100SEL pin must be set for 100M operations, a Normal Link Pulse has the same ISO/IEC  
definition regardless of whether the 10/100SEL pin is set for 10M (10 MHz) or 100M (100 MHz.)  
The Link Pulse Interface allows the MAC/repeater to control the transmission of Normal Link Pulses to the  
remote link partner, thereby allowing the MAC/repeater to control the auto-negotiation processes.  
The Link Pulse Interface consists of the following five signals: LTCLK, LPTX, LRCLK, LPRX, and SD.  
(When the ICS1892 MAC/Repeater Interface is configured for Link Pulse operations, its default MII pins are  
redefined. For more information, see Section 9.2.4.4, “MAC/Repeater Interface Pins for Link Pulse  
Interface”.)  
Table 6-3 lists the ICS1892 pin mappings for the ICS1892 Link Pulse Interface mode.  
Table 6-3. Pin Mappings for Link Pulse Interface Mode  
Default  
10M / 100M  
MII Pin Names  
MAC/Repeater Interface Pin Mappings, Configured for  
Link Pulse Interface Mode  
COL  
No connect  
CRS  
LSTA  
MDC  
MDIO  
No connect  
SD  
MDC  
MDIO  
RXCLK  
LRCLK  
RXD0, RXD1, RXD2, RXD3 No connect  
RXDV  
RXER  
TXCLK  
No connect  
LPRX  
LTCLK  
TXD0, TXD1, TXD2, TXD3 No connect  
TXEN  
TXER  
No connect  
LPTX  
IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™  
ICS1892  
29  
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