ICS1562B
User Programmable Differential Output Graphics Clock Generator
ICS1562B
TSD
a)
1
2
3
4
5
6
7
8
AD0
XTAL1
XTAL2
STROBE
VSS
VSS
LOAD
LD/N2
ICS1562B-001 Typical Interface
DATA BUS
0.1
µ
F
+5V
SELECT LOGIC
AD1
AD2
AD3
VDD
VDDO
IPRG
CLK+
CLK-
16
15
14
13
12
11
10
9
22
µ
F
+
+5V
0.1
µ
F
10
82
82
�½
+5V
510
0.1
µ
F
820
820
TO
RAMDAC
b)
ICS1562B-201 Typical Interface
GRAPHICS
CONTROLLER
0.1
µ
F
PROGRAMMING
INTERFACE
1
2
3
4
5
6
7
8
EXTFBK
XTAL1
XTAL2
DATCLK
VSS
VSS
LOAD
LD/N2
DATA
HOLD
BLANK
VDD
VDDO
IPRG
CLK+
CLK-
16
15
14
13
12
11
10
9
22
µ
F
+
+5V
0.1
µ
F
10
82
+5V
82
�½
+5V
510
0.1
µ
F
820
820
TO
RAMDAC
Figure 7
7
IDT™ / ICS™
User Programmable Differential Output Graphics Clock Generator
7
ICS1562B