Integrated
Circuit
Systems, Inc.
ICS1562B
DATA SHEET
ICS1562B
User Programmable Differential
Output Graphics Clock
Differential Output Graphics Clock Generator
User Programmable
Generator
Description
The
ICS1562B
is a very high performance monolithic phase-
locked loop (PLL) frequency synthesizer. Utilizing ICS’s ad-
vanced CMOS mixed-mode technology, the
ICS1562B
provides a low cost solution for high-end video clock genera-
tion.
The
ICS1562B
has differential video clock outputs (CLK+ and
CLK-) that are compatible with industry standard video DAC.
Another clock output, LOAD, is provided whose frequency is
derived from the main clock by a programmable divider. An
additional clock output is available, LD/N2, which is derived
from the LOAD frequency and whose modulus may also be
programmed.
Operating frequencies are fully programmable with direct con-
trol provided for reference divider, prescaler, feedback divider
and post-scaler.
Reset of the pipeline delay on Brooktree RAMDAC s may
be performed under register control. Outputs may also be set
to desired states to facilitate circuit board testing.
Simplified Block Diagram - ICS1562B
LOOP
FILTER
XTAL1
XTAL2
CRYSTAL
OSCILLATOR
PHASE-
FREQUENCY
DETECTOR
Features
•
•
•
•
•
•
•
•
•
Two programming options:
ICS1562B-001
(Parallel Programming)
ICS1562B-201
(Serial Programming)
Supports high-resolution graphics - CLK output to
260 MHz, with 400 MHz options available
Eliminates need for multiple ECL output crystal oscillators
Fully programmable synthesizer capability - not just a
clock multiplier
Circuitry included for reset of Brooktree RAMDAC pipe-
line delay
VRAM shift clock generation capability
(-201 option only)
External feedback loop capability (-201 option only)
Compact - 16-pin 0.150” skinny SOIC package
Fully backward compatible to ICS1562
ICS1562B - 001 Pinout
AD0
XTAL1
CHARGE
PUMP
VCO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD1
AD2
AD3
VDD
VDDO
IPRG
CLK+
CLK-
/R
XTAL2
STROBE
VSS
BLANK
�½
EXTFBK
PRESCALER
(-201 only)
MUX
/M
/A
VSS
LOAD
LD/N2
PROGRAMMING
INTERFACE
MUX
/2
FEEDBACK DIVIDER
16-Pin SOIC
DIFF.
OUTPUT
CLK+
CLK
−
/4
/ N1
MUX
DRIVER
LOAD
ICS1562B - 201 Pinout
EXTFBK
XTAL1
XTAL2
DATCLK
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DATA
HOLD
BLANK
VDD
VDDO
IPRG
CLK+
CLK-
/ N2
DRIVER
LD/N2
VSS
VSS
LOAD
Figure 1
RAMDAC is a trademark of Brooktree Corporation.
LD/N2
16-Pin SOIC
IDT™ / ICS™
User Programmable Differential Output Graphics Clock Generator
1
1562 B Rev B 10/07/04
ICS1562B
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
