ICS1887
Pin Descriptions
PIN
PIN NAME
TYPE
DESCRIPTION
Negative Supply Voltage
Transmitter Off*
NUMBER
1
2
3
4
5
6
7
8
VSS
TXOFF~2
CD~
TTL-Compatible
TTL-Compatible1
PECL
Carrier Detect input*
TX+
TX–
VSS
IPRG1
RX–
RX+
LB~
LOCK
RD4
RD3
VSS
RD2
RD1
RD0
RCLK
VDD
REF_IN
REF_OUT
VDD
TCLK
TD0
Positive Transmit serial data output
Negative Transmit serial data output
Negative supply voltage
PECL Output stage current set (TX)
Negative Receive serial data input
Positive Receive serial data input
Loop Back mode select*
Lock detect output
Recovered data output 4
Recovered data output 3
Negative supply voltage
Recovered data output 2
Recovered data output 1
Recovered data output 0
Recovered Receive clock output
Positive supply voltage
Positive reference clock/crystal input
Negative reference clock/crystal output
Positive supply voltage
Transmit clock output
Transmit data input 0
Transmit data input 1
Transmit data input 2
Transmit data input 3
Transmit data input 4
PECL
PECL
PECL
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TTL-Compatible
TD1
TD2
TD3
TD4
* Active Low Input.
Note:
1. A running production change will be made to this input in the June 1996 time frame to convert this
input from the TTL-compatible to PECL to more closely match applications requirements. See
Substituting the ICS1887 for the AMD PDR & PDT applications note for more information.
2. This pin was formerly used for Loop-Timed operation. If your design did not use loop timing, this
change does not affect you. If your application requires loop timing, please contact ICS.
2
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
