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ICS1887M 参数 Datasheet PDF下载

ICS1887M图片预览
型号: ICS1887M
PDF下载: 下载PDF文件 查看货源
内容描述: FDDI /快速以太网PHYceiverTM [FDDI / Fast Ethernet PHYceiverTM]
分类和应用: 以太网
文件页数/大小: 14 页 / 537 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1887  
Substituting the ICS1887  
for the AMD PDR & PDT  
CD PECL Input: Board Layout Options  
This note describes the issues involved in re-  
placing the AMD PDR & PDT with the  
ICS1887.  
Option 1  
Differential PECL to CMOS Conversion Circuit  
There are a number of implementation differ-  
ences between AMD’s PDR & PDT and the  
ICS1887. This note describes the differences  
and how they affect an application.  
Signal Detect  
Many twisted pair and fiber optic transceivers  
provide a signal detect indication that becomes  
active when the amount of energy being re-  
ceived reaches a threshold that makes it appear  
to be data and not ambient noise.  
The AMD PDR device has a single ended  
PECL input (SDI) and provides a TTL level  
output (SDO) that tracks the input. The input  
controls the source that the PLL locks to. When  
signal detect is asserted, the PLL locks to the  
incoming receive data. When signal detect is  
deasserted, the PLL locks to the LSCLK input  
to prevent locking to an off center frequency.  
Option 2  
The current ICS1887 device provides a single  
TTL-compatible input, carrier detect (CD~).  
When carrier detect is asserted, the ICS1887  
locks to the incoming receive data. When car-  
rier detect is deasserted, or if carrier detect is  
asserted and no data is present on the receive  
inputs, the PLL will free run and continue to  
provide RXCLK at the nominal 25 MHz  
frequency. This allows the carrier detect input  
to always be tied to an asserted level (ground).  
Single-Ended PECL to CMOS Conversion Circuit  
If a true signal detect is required by a chip that  
connects to the ICS1887, a simple, low cost  
PECL to CMOS converter can be used. The  
following circuit implements this function:  
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