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ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1531 Data Sheet - Preliminary  
8.1.2 Specific Guidelines for Printed Circuit Board Layout  
8.1.2.1 Digital Inputs  
Chapter 8 Layout and Power Considerations  
The ICS1531 digital inputs are designed to work with either 3.3-V and 5-V signals. No extra components  
are required.  
8.1.2.2 Analog Inputs  
To reduce noise, minimize traces for the ICS1531 analog red, green, and blue input pins by placing the  
ICS1531 as close as possible to the board’s input connector. Input connectors can include any of the  
following:  
15-pin D connector  
BNC connector  
Digital Visual Interface connector (from the Digital Display Working Group)  
‘P&D’, the ‘Plug and Display’ connector (from VESA)  
8.1.2.3 External Loop Filter  
The ICS1531 has software that allows for the selection of components for an internal loop filter for the pixel  
clock PLL. (The internal loop filter has the advantage of not requiring any extra components.)  
The ICS1531 also allows for the selection of components for an external loop filter for the pixel clock PLL.  
If the external loop-filter option is used, do the following:  
1. Place loop filter components as close as possible to the EXTFIL and XFILRET pins.  
2. For loop filter components, typical values are as follows:  
a. 6.8K for the series resistor  
b. 3300 pF RF-type capacitor for the series capacitor  
c. 33 pF for the shunt capacitor  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
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