AV9110
Pin Configuration
Clock Reference Implementations:
AV9110-01 vs. AV9110-02
The
AV9110
requires a stable reference clock (5 to 32 MHz) to
generate a stable, low jitter output clock. The
AV9 11 0 -01
is
optimized to use an external quartz crystal as a frequency
reference, without the need of additional external components.
The AV9110-02 is optimized to accept an TTL clock
reference. Either device can be used with an external crystal
or accept a TTL clock reference, although extra components
may be required. The various combinations implied are
summarized in Figure 2 (see page 7).
14 Pin Dip, SOIC
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
P I N NA M E
X1
AV D D
AGND
VDD
GND
DATA
SCLK
CE#
CLK/X
GND
VDD
CL K
OE
X2
PIN
TYPE
Input
P ow e r
P ow e r
P ow e r
P ow e r
Input
Input
Input
Output
P ow e r
Power
Output
Input
Output
DESCRIPTION
Crystal input or TTL reference clock.
ANALOG power supply. Connect to +5V.
ANALOG GROUND.
Digital power supply. Connect to +5V.
Digital GROUND.
Serial DATA pin.
SERIAL CLOCK. Clocks shift register.
CHIP ENABLE. Active low, controls data transfer.
CMOS CLOCK divided by X output.
Digital GROUND.
Digital power supply. Connect to +5V.
CMOS CLOCK output.
OUTPUT ENABLE. Tristates both outputs when low.
Crystal input or TTL reference clock.
2