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X24C02MIG-3.5 参数 Datasheet PDF下载

X24C02MIG-3.5图片预览
型号: X24C02MIG-3.5
PDF下载: 下载PDF文件 查看货源
内容描述: 串行E2PROM [Serial E2PROM]
分类和应用: 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 16 页 / 294 K
品牌: ICMIC [ IC MICROSYSTEMS ]
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X24C02  
DEVICE OPERATION  
Clock and Data Conventions  
Data states on the SDA line can change only during SCL  
LOW. SDA state changes during SCL HIGH are re-  
The X24C02 supports a bidirectional bus oriented protocol  
The protocol defines any device that sends data onto the  
served for indicating start and stop conditions. Refer to  
Figures 1 and 2.  
bus as a transmitter and the receiving device as the receiver.  
The device controlling the transfer is a master and the  
device being controlled is the slave. The master will always  
initiate data transfers and provide the clock for both transmit  
Start Condition  
All commands are preceded by the start condition,  
which is a HIGH to LOW transition of SDA when SCL is  
and receive operations. Therefore, the X24C02 will be  
considered a slave in all applications.  
HIGH. The X24C02 continuously monitors the SDA and SCL  
lines for the start condition and will not respond to  
any command until this condition has been met.  
Figure 1. Data Validity  
SCL  
SDA  
DATA  
CHANGE  
DATA STABLE  
3838 FHD F06  
3