iC-TW3 SENSOR SIGNAL CONDITIONER WITH
TEMPERATURE COMPENSATION AND LINE DRIVER
Rev B1, Page 14/24
A/B SIGNAL PATH
iC-TW3 incorporates two analog gain paths called compensated. Figure 4 depicts a diagram of a single
channel A and B, respectively. Gain and offset of both signal path, Table 8 below summarizes gain and offset
paths are independently controlled and temperature characteristics.
VDD
ENSIGAB
COFSA/B(5:0)
FILTER(1:0)
AO/BO
PINA/PINB
+
+
Input
dynamic
output
+
NINA/NINB
NAO/NBO
-
CGAINA/B(2:0)
FGAINA/B(7:0)
OGAIN(1:0)
SINGLEIN
FOFSA/B(7:0)
VDD/2
Figure 4: The A/B signal path
Input Amplifier
Dynamic Amplifier
Output Amplifier
-3 dB, 0 dB, 6 dB
Composite
Gain range
Gain step
0..36 dB
-2..18.4 dB
-5..60 dB
6.0 dB
0.08 dB
1.24V
input
0.25V
input
1.49V
input
Offset range input
referred
gain
gain
gain
40mV
input
2mV
input
Offset step input referred
gain
gain
gaininput = 10gain_of_input_amplifier_in_dB
20
Table 8: Overview of gain and offset characteristics
or damaged sensor connections. Any input terminal
Single ended signals
Single ended input functionality is provided by con- left unconnected is pulled to VDD and triggers a sensor
necting the negative input terminal (pins NINA and error condition err_sig.
NINB) to an internally generated voltage of VDD/2. This
is enabled by setting the control bit SINGLEIN to 1. Al-
ternatively, an externally generated reference voltage
may be applied to the negative input terminals.
ENSIGAB
Adr 0x03; Bit 0
Function
R/W
Code
0
Pull-up resistors disconnected and error reporting
disabled (default)
1
Pull-up resistors and error reporting active on A/B
inputs
SINGLEIN
Adr 0x01; Bit 5
Function
R/W
Code
0
1
A and B inputs are differential (default)
Table 10: Input signal error detection control
A and B inputs are single ended
Table 9: Single ended input functionality
Gain and offset
Registers CGAINA(2:0) and CGAINB(2:0) are used to
set the coarse gain. Coarse gain is static and it is not
changed by the temperature or automatic compensa-
tion algorithm.
Input error detection
Weak input pull-up resistors are enabled by setting
control bit ENSIGAB to 1. The resistors are at min-
imum 2.0 MΩ. When driving the input with a high
impedance source it might be necessary to disable The highest legal value for CGAINA(2:0) and
the pull-up resistors to avoid excessive signal distor- CGAINB(2:0) is 6. Equivalently registers COFSA(5:0)
tion. The pull-up resistors are used to sense floating and COFSB(5:0) are used to control the static off-
ICHAUS [ IC-HAUS GMBH ]
