iC-TW3 SENSOR SIGNAL CONDITIONER WITH
TEMPERATURE COMPENSATION AND LINE DRIVER
Rev B1, Page 13/24
Addressing
by generating a start condition followed by the write
The EEPROM address 0x00 maps to the 1-wire ad- command (000) and by the address and register data.
dress 128. Accessing EEPROM address 0 is therefore
equivalent to accessing memory location 128 through Read Sequence
the 1-wire interface. All other 1-wire addresses are A read sequence is depicted in Figure 3. After the start
thus determined by adding 128 to the EEPROM ad- condition the read command (001) is followed by the
dress of interest.
register address. The master then releases the wire
and iC-TW3 begins to pull low while internally access-
ing the data. When the data is ready it is produced
Write Sequence
Figure 2 describes the write sequence of the 1-wire in- while following the same PWM rules valid for the mas-
terface. On an idle wire, a write sequence is initiated ter.
1-Wire Write Access
Wire not driven
3-bit command word
000 = write
001 = read
Wire driven by master
Idle, wire is high
Filler bit, value 0
idle
start
000
address(7:0)
0
data(7:0)
idle
To initiate communication
8-bit register address:
Wait at least for tidle
before new access
pull low for at least t
0 to 127:
internal registers
start
128 to 255: external EEPROM
Figure 2: Register write sequence
Wire not driven
Wire driven by master
Wire driven by iC-TW3
1-Wire Read Access
3 bit command word
000 = write
001 = read
iC-TW3 starts returning data
(first bit is dummy)
Master releases driver
Idle, wire is high
idle
start
001
address(7:0)
delay
data(7:0)
idle
X
Wait at least for tidle
before new access
To initiate communication
8-bit register address:
iC-TW3 drives low until
data is ready
pull low for at least t
0 to 127:
internal registers
start
128 to 255: external EEPROM
Figure 3: Register read sequence