iC-TW3 SENSOR SIGNAL CONDITIONER WITH
TEMPERATURE COMPENSATION AND LINE DRIVER
Rev B1, Page 11/24
I2C INTERFACE
Startup
therefore equivalent to accessing memory location 128
An external I2C 1-kbit EEPROM (e.g. 24xx01 family) via the 1-wire interface (see page 12).
is used to store configuration parameters permanently.
On power-up and after reset is released iC-TW3 ac-
cesses the external EEPROM and reads its device
configuration according to Table 6.
EEPROM
Address
Description
Corresponding
Configuration Register
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
<reserved>
Config. 1
Config. 2
Config. 3
Config. 4
Temp. Sensing
Config. Index
Coarse Gain
COFSA
-
0x01
0x02
EEPROM Checksum
0x03
The checksum at address 0x0F contains the 8-bit sum
of registers 0x01 to 0x0E plus the 8-bit sum of all LUT
bytes up to and including the final block with its break-
point set to 255.
0x04
0x05
0x06
0x07
On startup iC-TW3 calculates the expected checksum
and compares it with the value stored at EEPROM
address 0x0F. If computed and stored address match
normal operation begins. Otherwise, iC-TW3 asserts
an error condition and pin NERR is pulled low.
0x08
COFSB
0x09
DGAINA
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
DGAINB
DOFSA
DOFSB
It is the user’s responsibility to store the correct check-
sum in the EEPROM during production programming.
Test 1
CHECKSUM
Description
EEPROM
Address
LUT Block Number
CHECKSUM(7:0) Adr 0x0F; Bit 7:0
R/W
Code
...
Function
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
Breakpoint 0
GAINA
0
0
0
0
0
0
1
1
1
1
1
1
Checksum of EEPROM contents
GAINB
Table 5: Checksum
OFSA
OFSB
OFSZ
EEPROM Register Map
Breakpoint 1 (255)
GAINA
The 14 bytes of device configuration data are followed
by a minimum of 2 to a maximum of 16 lock-up-table
blocks (LUT). The LUT block size is 6 bytes each and
the final block is indicated by its breakpoint value of
255.
GAINB
OFSA
OFSB
OFSZ
.
.
.
.
.
.
.
.
.
Thus, a minimum of 28 bytes are read with 2 active
LUT blocks and 112 bytes are read with 16 active LUT
blocks during the configuration phase. Note that the
checksum is only calculated up and including the last
LUT block. The last LUT block ist indicated by a break-
point value of 255. Further descriptions on LUTs are
given in section "Temperature Compensation" on page
21.
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
Breakpoint 255
GAINA
15
15
15
15
15
15
GAINB
OFSA
OFSB
OFSZ
Note that the EEPROM address space maps to the
1-wire address 128. Accessing EEPROM address 0 is
Table 6: EEPROM register map
ICHAUS [ IC-HAUS GMBH ]
