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IC-MR 参数 Datasheet PDF下载

IC-MR图片预览
型号: IC-MR
PDF下载: 下载PDF文件 查看货源
内容描述: 13位S &H SIN / COS插补算法Controller接口 [13-BIT S&H SIN/COS INTERPOLATOR WITH CONTROLLER INTERFACES]
分类和应用:
文件页数/大小: 44 页 / 1160 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MR
13-BIT S&H SIN/COS
preliminar y
Rev A1, Page 6/44
INTERPOLATOR WITH CONTROLLER INTERFACES
ELECTRICAL CHARACTERISTICS
Operating conditions:
VDDA = VDD = 4.5...5.5 V, GNDA = GND = 0 V, IBP calibrated to 200 µA, Tj = -40...125 °C, unless otherwise noted.
Item
No.
001
002
003
004
Symbol
Parameter
Conditions
Min.
VDDA,
VDD
I(VDDA)
I(VDD)
Vc()hi
Permissible Supply Voltage
VDDA Supply Current
VDD Supply Current
Clamp Voltage hi
at digital inputs ASLI, SLI, MAI,
NCS, NL, NRD, NWR, NRES,
NERR, SDA, SCL, TMS
Clamp Voltage hi
at digital inputs D(7...0)
Vc()hi = V() - V(VDD),
I() = 4 mA
0.3
4.5
Typ.
5
25
5
Max.
5.5
50
50
1.2
V
mA
mA
V
Unit
General
005
006
Vc()hi
Vcz()hi
Vc()hi = V() - V(VDD),
I() = 1.6 mA
0.3
1.2
11
V
V
Clamp Voltage hi
I() = 4 mA
at ACO, VDDA, PSO, NSO, PCO,
NCO, AMAO, SLO, ADC, PSI,
NSI, VREF, PCI, NCI
Clamp Voltage lo
I() = -4 mA
at ACO, VDDA, PSO, NSO, PCO,
NCO, AMAO, SLO, ADC, PSI,
NSI, VREF, PCI, NCI
Bias Current Source
Reference Voltage VPAH
Reference Voltage V05
Internal Ref. Voltage VREFI
Permissible Input Voltage at
VREF
Input Resistance at VREF
Output Voltage at VREF
Leakage Current at VREF
A/D Converter Resolution
A/D Conversion Time
Maximum Full Scale Input
Voltage
A/D Conversion Nonlinearity
0.75
-0.1
-100
16.4
-300
10
0.125
1.1
1.6
2.2
3.2
1.6
2.3
3.2
4.6
0.15
referenced to side of input;
GR = 0x4, GFC = 0x1F, GFS = 0x7C0
20
ADCSLOP = 0xFF
ADCSLOP = 0x00
DCPOS = 1
DCPOS = 0
SELREF = 0x3
SELREF = 0x3, REFVOS = 0x3, UIN = 1,
TUIN = 0, Rin() referenced to VREFin()
SELREF = 0x2, I() = 0
SELREF = 0x0 or 0x1
-1
12
1.1
2.5
2.0
IBP calibrated to 200 µA
referenced to GNDA
-1.2
007
Vc()lo
-0.3
V
Bias Current Source, Reference Voltages, Input/Output VREF
101
102
103
104
105
106
107
108
601
602
603
604
IBP
VPAH
V05
VREFI
Vin()
Rin()
Vref()out
I0()
RESOadc
t()adc
Vin()FS
INL()
92.5
45
450
1.35
2.25
0.5
20
26
100
+1
100
50
500
1.5
2.5
107.5
55
550
1.65
2.75
VDDA
2
30
%
%VDDA
mV
V
V
V
kΩ
%VREFI
µA
bit
ms
V
V
±0.95
VDDA
1.5
VDDA
+ 0.1
100
23.6
-10
300
1
2.1
3.0
4.2
6.0
300
kΩ
kΩ
kΩ
kΩ
%/K
µV
LSB
V
V
nA
kΩ
µA
µA
12-bit A/D Converter, Measuring Input ADC
Signal Conditioning, Inputs: PSI, NSI, PCI, NCI
701 Vin()sig
Permissible V Mode Input Voltage UIN = 1, TUIN = 0
UIN = 1, TUIN = 1, DCPOS = 1
702
703
704
705
706
Iin()
Rin()
Iin()sig
CTR()sig
Rin()
V Mode Input Current
V Mode Input Resistance
UIN = 1, TUIN = 0
UIN = 1, TUIN = 1, vs. VREFin, Tj = 27 °C,
Permissible I Mode Input Current UIN = 0, DCPOS = 0
UIN = 0, DCPOS = 1
Permissible Signal Contrast Ratio current ratio of Iin()pkpk vs. Iin()dc
I Mode Input Resistance
Tj = 27 °C, vs. VREFin;
UIN = 0, RIN = 00
UIN = 0, RIN = 01
UIN = 0, RIN = 10
UIN = 0, RIN = 11
707
708
TC(Rin)
Vin()os
Temperature Coefficient of Rin
Offset Voltage of Input Stage