iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 17/59
REGISTER MAP (EEPROM)
OVERVIEW
Adr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Signal Conditioning Master Channel
0x00
0x01
GFC_M
GR_M
GFS_M(7:0)
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
MPS_M(4:0)
GFS_M(10:8)
MPS_M(9:5)
MPC_M(2:0)
ORS_M(0)
MPC_M(9:3)
OFS_M(6:0)
ORS_M(1)
OFC_M(1:0)
ORC_M
OFS_M(10)*
OFS_M(9:7)
OFC_M(9:2)
PH_M(6:0)
OFC_M(10)*
PH_M(9)*
PH_M(8:7)
Signal Conditioning Master Channel and Analog Parameters
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
1
DCPOS
REFVOS
TUIN
RIN
UIN
1
CVREF
0
BYP
ACOT_M(0)
ACOR_M(1:0)
CFGTA(2:0)
ACOC_M(4:0)
CFGIBP(3:0)
ACOT_M(1)
ENF(1:0)
CFGTA(4:3)
*) MSB and signum respectively.
Table 5: Register layout
ICHAUS [ IC-HAUS GMBH ]
