iC-ML
HALL Position Sensor / Encoder
Rev A3, Page 4/17
ELECTRICAL CHARACTERISTICS
Operating conditions: VDD = 5 V ±10 % , Tj = -40 ... 125 °C, unless otherwise noted
Item Symbol
No.
Parameter
Conditions
Unit
Min.
Typ.
Max.
General
001 VDD
Supply voltage
Supply current
4.5
5
5.5
V
002
I(VDD)
open pins, normal operation
open pins, power reduction mode (PRM)
14
7
20
10
mA
mA
003 I(VDD)sb Standby supply current
004 td(VDD)on Turn on delay
005 td(VDD)off Turn off delay
Hall sensor array
NEN = VDD
200
µA
µs
µs
VDD > 4 V, see Fig. 9
VDD < 2.6 V
10
10
101 Hext
Requiered external magnetic field at chip surface
20
50
100
kA/m
strength
102 psens
103 ysens
Hall sensor array pitch
see Fig. 1
see Fig. 1
1.28
0.7
mm
mm
Hall sensor array distance to
center of die
104 xdis
105 ydis
106 Φdis
107 hsens
Lateral displacement of chip to
package
in TSSOP20 package, see Fig. 2
-0.2
-0.2
-3
0.2
0.2
3
mm
mm
DEG
µm
Vertical displacement of chip to in TSSOP20 package, see Fig. 2
package
Angular displacement of chip with in TSSOP20 package, see Fig. 2
reference to package
Distance chip surface to top of
package
in TSSOP20 package, see Fig. 2
400
Signal conditioning
201 Voff
Offset voltage
on output, with external magnetic field ampli-
tude of 20 kA/m
-50
-50
50
50
mV
µV/K
202 TC(Voff)
Temperatur coefficient of offset
voltage
203 Vdc
Output mean value
Amplitude ratio of SIN / COS
Cut off frequency
45
50
1.00
20
55
%VDD
204 Ratio
205 fhc
0.95
1.05
kHz
µs
V
206 t()settle
207 V()gain
208 V()ampl
Settling time
to 70 % amplitude, Hext = 40 kA/m
V()ampl = V()max - Vdc
80
150
4.0
1.1
Gain output voltage
Sine/Cosine amplitude
0.05
0.9
1.0
V
Sine-to-digital converter
301 AArel
Relative angular error
Oscillator frequency
with reference to one periode, see Fig. 3
-20
20
%
302 f(OSC)
200
256
-0.1
300
kHz
%/K
303 TC(OSC) Temperature coefficient of oscilla-
tor frequency
304 hys
Converter hysteresis
1
LSB
Configuration inputs CFG1, CFG2, CFG3
401 Vt()hi
402 Vt()lo
403 V0()
Threshold voltage high
Threshold voltage low
Open circuit voltage
Input resistance
60
25
43
45
78
40
% VDD
% VDD
% VDD
kΩ
57
404 Ri()
150
-120
450
Enable input NEN
501 Vt()hi
502 Vt()lo
503 Vt()hys
504 Ipu()
Threshold voltage high
Threshold voltage low
Hysteresis
2
V
V
0.8
300
-240
Vt()hys = Vt()hi - Vt()lo
V() = 0...VDD - 1 V
mV
µA
Pull-up current
-25
Digital outputs: A, B, C, D
601 Vs()hi
602 Vs()lo
603 tr()
Saturation voltage high
Vs()hi = VDD - V(), I() = -4 mA
I() = 4 mA
0.4
0.4
60
V
V
Saturation voltage low
Rise time
CL() = 50 pF
ns
ICHAUS [ IC-HAUS GMBH ]
