iC-ML
HALL Position Sensor / Encoder
Rev A3, Page 2/17
DESCRIPTION
The CMOS device iC-ML consists of four hall sen- is output via an incremental interface in a number
sors arranged in a line and optimized to read out of selectable resolutions. The zero position of each
magnetic tapes with 2.56 mm pole spacing. This periode is indicated by an index pulse. The maxi-
sensor array permits error-tolerant adjustment of the mum resolution of 8-bit is maintained up to travelling
magnetic tape, reducing assembly efforts. The inte- speeds of 5 m/s.
grated signal conditioning unit provides a differential
sine/cosine signal at the output.
The absolute position within a magnetic periode can
be converted back to a linear analog output signal
The sensor generates one sine/cosine cycle for each using the internal D/A converter; here, output volt-
full magnetic periode of 5.12 mm, enabling the trav- age limits can be set as required using the external
elling distance to be clearly determined. At the same pins. Either a periodic linear signal (sawtooth) or a
time the internal amplitude control unit produces an delta voltage (triangle) can be provided. iC-ML can
regulated output amplitude of 2 Vpp regardless of be easily cascaded in three different modes of chain
variations in the magnetic field strength, supply volt- operation so that several axes of transistion can be
age and temperature. Furthermore, signals are pro- scanned. The linear positions of the individual axes
vided which enable the sensor amplitude to be as- can then be read via a common bus.
sessed and also report any magnetic tape loss.
Used in conjunction with a magnetic tape iC-ML can
With the aid of the integrated 8-bit sine/digital con- act as an linear encoder system with an integrated
verter the travelling distance within a magnetic peri- magnetic scanning feature.
ode is determined from the sine/cosine signals. This
PACKAGES TSSOP20
PIN CONFIGURATION - TSSOP20
PIN FUNCTIONS
No. Name Function
1 T0
Test Pin (connect to GND)
2 NEN Enable Input, low active
3 n.c.
4 GND Ground
5 n.c.
6 CFG2 Configuration Input 2
7 B
8 n.c.
9 A
Bidirectional Input/Output B
Bidirectional Input/Output A
10 n.c.
11 VTC Test Pin (do not connect)
12 D
Bidirectional Input/Output D
13 n.c.
14 C
Bidirectional Input/Output C
15 CFG3 Configuration Input 3
16 n.c.
17 VDD +5 V Supply Voltage
18 n.c.
19 CFG1 Configuration Input 1
20 VTS Test Pin (do not connect)
ICHAUS [ IC-HAUS GMBH ]
