iC-LNG 16-BIT OPTO ENCODER
WITH SPI AND SERIAL / PARALLEL OUTPUTS
Rev A1, Page 13/25
The configuration registers in the internal RAM are After the system enable (power-on reset, pin POK
constantly monitored by a parity check. Bit 7 of each lo → hi) the registers are initialized as follows:
address is the parity bit (P0-PF) and is supplemented
to an even number of ones. The unused bits are also
monitored. A parity error is signaled at pin ERR (high
active).
Addresses in iC-LNG range from addresses 0x00 to
0x0F. As only the lower nibble of the address byte is
evaluated, with addresses that are greater than 0x0F
the device then returns to address range 0x00-0x0F.
Address
0x00 - 0x01
0x02 - 0x05
0x06
Reset value
0xA0
0xC0
0xA0
0x07
0x81
0x08
0x96
0x09 - 0x0F
0x00
Table 7: Register reset values
ICHAUS [ IC-HAUS GMBH ]
