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IC-JXMQFP52 参数 Datasheet PDF下载

IC-JXMQFP52图片预览
型号: IC-JXMQFP52
PDF下载: 下载PDF文件 查看货源
内容描述: 16倍, 24 V与μC接口高侧驱动器 [16-FOLD 24 V HIGH-SIDE DRIVER WITH μC INTERFACE]
分类和应用: 驱动器
文件页数/大小: 36 页 / 603 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 9/36
ELECTRICAL CHARACTERISTICS
Operating conditions: VCC = VDD = 3 ... 5.5 V, VBy = 12 ... 36 V, GNDA = GNDD = 0 V, RSET = 10 kΩ ±1% . All inputs on defined logic
states (high or low), Tj = -40 ... 125 °C unless otherwise stated. Functionality and parameters beyond operating conditions (for example
w.r. to independent voltage supplies) are to be verified within the individual application by FMEA methods.
Item
No.
740
Symbol
DR3
IO,0
Parameter
Relative value using VR3 range
(internal reference)
Conditions
Min.
SELAD = ’0b100’, EME = ’0b0’, SVREF = 0;
DR3
IO,0
= D3
IO,0
(V) / D3
IO,0
V(IOx) = 0.3V
V(IOx) = 0.1V
SELAD = ’0b100’, EME = ’0b1’, SVREF = 0,
V(IOx) = 5.0V
SELAD = ’0b100’, EME = ’0b1’, SVREF = 0;
DR4
IO,0
= D4
IO,0
(V) / D4
IO,0
V(IOx) = 2.5V
V(IOx) = 0.6V
SELAD = ’0b011’, SVREF = 0
V(IOx) = 36.0V
SELAD = ’0b011’, SVREF = 0;
DR5
IO,0
= D5
IO,0
(V) / D5
IO,0
V(IOx) = 24.0V
V(IOx) = 5.0V
Typ.
Max.
Unit
48
14.5
790
50
16
840
52
18.5
1022
%
%
741
742
D4
IO,0
DR4
IO,0
Digital value using VR4 range
(internal reference)
Relative value using VR4 range
(internal reference)
48
9.5
810
50
11.5
870
52
14
1022
%
%
743
744
D5
IO,0
DR5
IO,0
Digital value using VR5 range
(internal reference)
Relative value using VR5 range
(internal reference)
64.6
11.8
720
66.6
13.8
820
68.6
15.8
1022
%
%
745
746
DC
IO,0
DRC
IO,0
Digital value of current measure- SELAD = ’0b001’, SVREF = 0, I(IOx) = 150mA
ment (internal reference)
Digital value of current
SELAD = ’0b001’, SVREF = 0;
measurement (internal reference) DRC
IO,0
= DC
IO,0
(I) / DC
IO,0
I(IOx) = 75mA
I(IOx) = 15mA
Voltage at RSET
Range value for RSET
Input On-Threshold for burst
recognition
Input Off-Threshold for Burst-
recognition
Delay time to Reset after spike at Spike duration: 10 ns
VCC, VDD
Threshold voltage for open ciruit
detection on pins GNDA, GNDD
Minimum duration for open circuit V(GNDA,GNDD) = 0 V ... Vt()gnd
detection
Delay time to reset after open
circuit detection at GNDA, GNDD
Undervoltage message VB1...4
on
Undervoltage message VB1...4
off
Hysteresis
Minimum duration for Power-
Down detection
Delay time for undervoltage mes-
sage VB1...4
Threshold voltage High at
D0...7 with input function
Schmitt-Trigger-Inputs
NCS, NWR, NRD, A0...4, NRES,
CLK, BLFQ, D0...7, NSP, POE
VByhys = VByon - VByoff
VBy = 0.8 V ... VByoff
48
6.2
1.15
9
1.3
1.4
2
51
9.2
1.22
10
54
12.2
1.30
14
2.9
3
110
%
%
V
kΩ
V
V
µs
Input RSET
B01
B02
V(RSET)
R(RSET)
Burst-Indication
C01 VSPon
C02 VSPoff
C03 tpoff
Pin monitoring GNDA, GNDD
H01 Vt()gnd
H02 tmin()gnd
H03 tpoff
35
1
15
65
mV
µs
µs
Undervoltage detection VB
I01
I02
I03
I04
I05
VByon
VByoff
VByhys
tmin()lv
tpoff
10.6
10.0
400
1
6
11.2
10.6
11.8
11.2
V
V
mV
µs
µs
µC-Intrface, I/O-Logic, Frequency divider, Interrupt
K01
Vt()hi
2
V