iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 15/36
Input Register A (read only)
Adr. 0x00
reading of inputs / output feedback
reset entry: 0x00
Bit
7
6
5
4
3
2
1
0
Name
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
Bit7...0
IN8...1
0
1
Input/Output IOx read ’0’
Input/Output IOx read ’1’
(r)
Input Register B (read only)
Adr. 0x01
reading of inputs / output feedback
reset entry: 0x00
0
Bit
7
6
5
4
3
2
1
Name
IN16
IN15
IN14
IN13
IN12
IN11
IN10
IN9
Bit7...0
IN16...9
0
1
Input/Output IOx read ’0’
Input/Output IOx read ’1’
(r)
INx indicates the state for IOx (via I/O filter or bypass).
Change-of-input Message A (read only)
Adr. 0x02
for I/O stages in input mode
reset entry: 0x00
Bit
7
6
5
4
3
2
1
0
Name
DCH8
DCH7
DCH6
DCH5
DCH4
DCH3
DCH2
DCH1
Bit7...0
DCH8...1
0
1
No change of state at the input IOx or no interrupt enable
Input IOx has had a change of state enabled for interrupt messages
(r)
Change-of-input Message B (read only)
Adr. 0x03
for I/O stages in input mode
reset entry: 0x00
Bit
7
6
5
4
3
2
1
0
Name
DCH16
DCH15
DCH14
DCH13
DCH12
DCH11
DCH10
DCH9
Bit7...0
DCH16...9 1
0
No change of state at the input IOx or no interrupt enable
Input IOx has had a change of state enabled for interrupt messages
(r)