iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 17/36
Overcurrent Message A (read only)
Adr. 0x06
reset entry: 0x00
0
Bit
7
6
5
4
3
2
1
Name
SCI8
SCI7
SCI6
SCI5
SCI4
SCI3
SCI2
SCI1
Bit7...0
SCI8...1
0
1
No Message
(r)
Output IOx has had an overcurrent state enabled for interupt messages (short circuit)
Overcurrent Message B (read only)
Adr. 0x07
reset entry: 0x00
Bit
7
6
5
4
3
2
1
0
Name
SCI16
SCI15
SCI14
SCI13
SCI12
SCI11
SCI10
SCI9
Bit7...0
SCI16...9
0
1
No Message
(r)
Output IOx has had an overcurrent state enabled for interupt messages (short circuit)
Read access gates off changes to the register; the register is reenabled only when reset via EOI. Any successive
interrupts which occur during the read-out phase and before a reset with EOI are trapped by an interrupt pipeline.
If this happens, the message at NINT resp. D1/SOC or D2/SOB cannot be deletet by EOI, i.e. NINT resp.
D1/SOC or D2/SOB constantly remains on low. In this instance, EOI fills the overcurrent message from the
pipeline.
The SCIx bits may be erased selectable by reenabeling IENx after disable.
’0’ is output for IOx pins in input mode. SCIx reports for IOx.
Overcurrent Status A (read only)
Adr. 0x08
reset entry : 0x00
Bit
7
6
5
4
3
2
1
0
Name
SC8
SC7
SC6
SC5
SC4
SC3
SC2
SC1
Bit7...0
SC8...1
0
1
No overcurrent
Overcurrent in output IOx, e.g. through a low-side short circuit
(r)
Overcurrent Status B (read only)
Adr. 0x09
reset entry: 0x00
Bit
7
6
5
4
3
2
1
0
Name
SC16
SC15
SC14
SC13
SC12
SC11
SC10
SC9
Bit7...0
SC16...9
0
1
No overcurrent
Overcurrent in output IOx, e.g. through a low-side short circuit
(r)
These signals act as error analysis and does not generate any interrupts (real time, no register). ’0’ is output for
IOx pins in input mode. SCx reports for IOx.