iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 20/23
Interrupts
Interrupt outputs at INTN can be triggered by a change of (filtered) input signal, by overcurrent, signaled at an
I/O pin (e.g. due to a short circuit), or by exceeding maximum temperature levels (2 stages).
For each individual I/O stage, interrupt outputs can be caused by a change of input, or, with stages in output
mode, also by a short circuit. The relevant interrupt enables determine which messages are stored and
displayed. The display of interrupt messages caused by excessive temperature is not maskable; it is
permanently enabled.
When an event occurs which is enabled to produce an interrupt output, pin INTN is set to ‘0’. An interrupt status
register read-out (add. 2) enables the nature of the message to be determined and the I/O stage causing the
interrupt to be located. Thus with a change-of-input message the initiating I/O stage is shown in the
corresponding register (add. 1); with an overcurrent interrupt, the overcurrentmessage register (add. 3) pinpoints
the I/O stage with a short circuit.
Interrupts are deleted by simply setting EOI in control word 4. This bit then automatically resets to ‘0’. If during
operation the I/O mode is switched, i.e. from input to output mode, all interrupt messages are deleted via EOI.
To avoid interrupt messages caused by other sources in the time between the read-out of an interrupt register
and the deletion of the current interrupt being overlooked, successive interrupts are stored in a pipeline. In the
event of there being any successive interrupts, output INTN remains at ‘0’ after the current interrupt has been
deleted using EOI. The new interrupt source is shown in the interrupt status register and in the type-specific
status registers.
Overcurrent messages
With an overload at one of the outputs the current in IOx is limited. In this instance an interrupt message is
displayed, providing relevant interrupt enables have been set for overcurrent messages (add. 9) and the filter
time set with control word 4 has elapsed. If this happens, ISCI is set in the interrupt status register (add. 2) and
the relevant bit is set for the initiating I/O stage in the overcurrent message register (add. 3).
Under address 4 the current, unfiltered overcurrent status of each I/O stage can be read; an overall scan of all
the I/O stages is also possible via bit SCS of the interrupt status register. This shows whether any of the I/O
stages have overcurrent at the time of the readout. This short-circuit messaging allows permanent monitoring of
the output transistors and clear allocation of the error message to the I/O stage affected.
Filtering of the overcurrent message can be shutdown via a bypass; this bypass can be activated for all I/O
stages together using BYPSCF in control word 4 (add. 13).
Temperature monitoring
iC-JRX has a two-stage temperature monitor circuit.
Stage 1:
A warning interrupt (INTN= 0) is generated if the first temperature level (Toff 1 at ca. 125 EC)
is exceeded. Suitable measures to decrease the power dissipation of the driver can be
implemented via the microcontroller.
Stage 2:
If the second temperature level is exceeded (Toff 2 at ca. 150 EC), a second interrupt is
generated (INTN= 0). At the same time the output transistors and the I/O stage current sources
are shutdown, the output register and flash mode enable deleted.
Once the temperature level has returned to below that of Toff1 the current sources are
reactivated. The output register and flash pulse enable have to be respecified to activate the
output stages.
The interrupt status register (add. 2) gives information as to the stage of temperature interrupt but also on the
current status of the temperature monitor. ET2 and ET1 statically indicate when Toff2 and Toff1 are exceeded,
whereby the stored interrupt messages IET2 and IET1 and the display at INTN via EOI= 1 can be deleted
(control word 4).
ICHAUS [ IC-HAUS GMBH ]
