iC-GF
TRANSCEIVER
Rev C1, Page 14/26
is not critical; high current can also be tolerated for VCC and VCC3. Both undervoltage detectors are fil-
a short period and with low repeat rates. This is tered against spurious events smaller than 25 µs (cf.
particularly important when switching capacitive loads Electrical Characteristics No. 404). In case of a valid
(charge/discharge currents).
undervoltage event (longer than 25 µs) both QPx and
QNx are unconditionally brought to high impedance for
at least 35 ms (cf. Electrical Characteristics No. 405)
resp. as long as the duration of the undervoltage situ-
ation.
VBR
NUVD
NOVL
OEN
Qyx
Digital filtering at inputs
To obtain high noise immunity the pins QCFGx,
INV1/ESPI, IN1/TX, IN2, OEN, CFI and CFP have a
digital input filter. Figure 5 shows this filter time ttrig for
INx (cf. Electrical Characteristics Nos. 613 to 616 and
816 to 819).
tuvcl
toldly
toldcl
Figure 6: Permanent short circuit
VBR
NUVD
NOVL
OEN
Feedback channel CFI–CFO
iC-GF implements a feedback channel which permits
a communication from the line side to the sensor side.
High voltage digital signals at CFI are converted into
low voltage (open-collector) levels at CFO.
INx
Qyx
Off
Spread spectrum oscillator
Integrator
To reduce the electromagnetic interference generated
by the switching converter (pin VHL) a spread spec-
trum oscillator has been introduced. Here the switch
is not triggered by a fixed frequency but by a varying
32 step frequency mix. Generated interference is then
tuvcl
toldcl
Figure 7: Overload
So that this is possible a shared back-end integrator distributed across the frequency spectrum with its am-
follows the switches for the purpose of overload detec- plitude reduced at the same time.
tion. This integrator is an 8-bit counter which is up-
dated together with the oscillator clock. If an overload
is detected on one channel the counter is incremented
by 1; an overload on both channels increments the
counter by 2. If no overload is apparent the counter is
decremented by 1 every 10 clock pulses. A maximum
duty cycle – without deactivation of the switches – of
1:10 results if one channel is overloaded. Only when
this ratio is exceeded the counter can reach its maxi-
mum value, generating an error message at NOVL and
deactivating the switches.
Configuration mode
Leaving pin INV1 unconnected (cf. Table 1) selects SPI
mode for configuration. All functions implemented in
DEFAULT mode are also available in SPI mode plus
some additional functions, available in SPI mode only.
Mode Select
INV1 MODE
L
H
Z
DEFAULT
DEFAULT
SPI
Undervoltage detection
iC-GF features two separate undervoltage detectors:
voltage monitoring at VBO and voltage monitoring at
Table 1: Operating mode configuration
ICHAUS [ IC-HAUS GMBH ]
