Si4430/31/32-B1
3.5. Frequency Control
For calculating the necessary frequency register settings it is recommended that customers use Silicon Labs’
Wireless Design Suite (WDS) or the EZRadioPRO Register Calculator worksheet (in Microsoft Excel) available on
the product website. These methods offer a simple method to quickly determine the correct settings based on the
application requirements. The following information can be used to calculated these values manually.
3.5.1. Frequency Programming
In order to receive or transmit an RF signal, the desired channel frequency, f
, must be programmed into the
carrier
Si4430/31/32. The Si4431/32 and Si4430 cover different frequencies. This section discusses the frequency range
covered by all EZRadioPRO devices. Note that this frequency is the center frequency of the desired channel and
not an LO frequency. The carrier frequency is generated by a Fractional-N Synthesizer, using 10 MHz both as the
rd
reference frequency and the clock of the (3 order) ΔΣ modulator. This modulator uses modulo 64000
accumulators. This design was made to obtain the desired frequency resolution of the synthesizer. The overall
division ratio of the feedback loop consist of an integer part (N) and a fractional part (F).In a generic sense, the
output frequency of the synthesizer is as follows:
fOUT 10MHz(N F)
The fractional part (F) is determined by three different values, Carrier Frequency (fc[15:0]), Frequency Offset
(fo[8:0]), and Frequency Deviation (fd[7:0]). Due to the fine resolution and high loop bandwidth of the synthesizer,
FSK modulation is applied inside the loop and is done by varying F according to the incoming data; this is
discussed further in "3.5.4. Frequency Deviation" on page 27. Also, a fixed offset can be added to fine-tune the
carrier frequency and counteract crystal tolerance errors. For simplicity assume that only the fc[15:0] register will
determine the fractional component. The equation for selection of the carrier frequency is shown below:
fcarrier 10MHz(hbsel 1)(N F)
fc[15:0]
fTX 10MHz*(hbsel 1)*( fb[4:0] 24
)
64000
D7
D6
D5
D4
D3
D2
D1
D0 POR Def.
Add R/W Function/Description
73 R/W
Frequency Offset 1
fo[7]
fo[6]
fo[5]
fo[4]
fo[3]
fo[2]
fo[1] fo[0]
fo[9] fo[8]
fb[1] fb[0]
fc[9] fc[8]
00h
00h
35h
BBh
74 R/W
Frequency Offset 2
75 R/W Frequency Band Select
sbsel
fc[14]
hbsel
fc[13]
fb[4]
fb[3]
fb[2]
76 R/W
77 R/W
Nominal Carrier
Frequency 1
fc[15]
fc[7]
fc[12]
fc[11]
fc[10]
fc[2]
Nominal Carrier
Frequency 0
fc[6]
fc[5]
fc[4]
fc[3]
fc[1] fc[0]
80h
The integer part (N) is determined by fb[4:0]. Additionally, the output frequency can be halved by connecting a ÷2
divider to the output. This divider is not inside the loop and is controlled by the hbsel bit in "Register 75h.
Frequency Band Select." This effectively partitions the entire 240–960 MHz frequency range into two separate
bands: High Band (HB) for hbsel = 1, and Low Band (LB) for hbsel = 0. The valid range of fb[4:0] is from 0 to 23. If
a higher value is written into the register, it will default to a value of 23. The integer part has a fixed offset of 24
added to it as shown in the formula above. Table 12 demonstrates the selection of fb[4:0] for the corresponding
frequency band.
After selection of the fb (N) the fractional component may be solved with the following equation:
fTX
fc[15:0]
fb[4:0] 24 *64000
10MHz*(hbsel 1)
fb and fc are the actual numbers stored in the corresponding registers.
Rev 1.0
25
IBM [ IBM ]
