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IBMPPC750CLGEQ4023 参数 Datasheet PDF下载

IBMPPC750CLGEQ4023图片预览
型号: IBMPPC750CLGEQ4023
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 400MHz, CMOS, PBGA278, 21 X 21 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034, FCBGA-278]
分类和应用: 时钟外围集成电路
文件页数/大小: 70 页 / 981 K
品牌: IBM [ IBM ]
 浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第62页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第63页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第64页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第65页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第66页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第68页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第69页浏览型号IBMPPC750CLGEQ4023的Datasheet PDF文件第70页  
Datasheet  
DD2.X  
Preliminary  
IBM PowerPC 750CL RISC Microprocessor  
E
Index  
electrical characteristics, 21  
electrical specifications, 23  
Numerics  
32 bit data bus, 64  
64 bit data bus, 64  
F
FCPBGA, 37  
features, 9  
fixed point unit, 10  
floating point unit, 10  
A
absolute maximum ratings, 21  
AC electrical characteristics, 24  
adhesive materials vendors, 61  
adhesives and thermal interface, 59  
G
general parameters, 20  
B
H, I, J, K  
ball placement, 40  
block diagram, 19  
heat sink requirements, 57  
heat sink selection, 61  
heat sink vendors, 57  
IEEE timing, 34  
boundary scan, 35  
boundary scan register, 66  
branch processing unit, 9  
bus input AC specifications, 27  
bus interface, 11  
input setup timing, 28  
input timing, 29  
bus output AC specifications, 31  
bus output timing, 31  
bypass register, 66  
input timing definition, 29  
input usage, 51  
instruction encodings, 65  
JTAG AC timing, 34  
JTAG clock input, 35  
JTAG instructions, 65  
JTAG test access port, 64  
C
C4 package with heat sink, 58  
capacitor decoupling, 46  
clock AC timing, 25  
L
clock generator, 26  
clock specifications, 25  
L1 cache, 10  
L2 cache, 10  
level 1 cache, 10  
level 2 cache, 10  
level protection, 63  
linear sweep modulation profile, 27  
load unit, 9  
D
data registers, 65  
DC electrical characteristics, 21  
debug system enablement, 66  
decode, 9  
decoupling capacitor layout, 47  
design considerations, 26, 63  
die temperature monitor, 48  
dispatch unit, 9  
M
mechanical specifications, 38  
memory management unit, 10  
mode select, 63  
driver impedance, 50  
driver impedance measurement, 50  
mode select input, 30  
Version 2.5  
Index  
December 2, 2008  
Page 67 of 70