Datasheet
DD2.X
PowerPC 750CL Microprocessor
Preliminary
Table 3-5. Power Consumption
See Table 3-2 on page 22 for recommended operating conditions.
VDD Range
(For Reference)
Frequency
TJ
(°C)
Power
(W)
NominaI
Mode
Part Number
Notes
V
DD (V)
0.95
1.00
1.05
1.15
1.15
1.20
1.27
(MHz)
Maximum
Maximum
Maximum
Maximum
Maximum
Maximum
Maximum
IBMPPC750CLGEQ40xx
IBMPPC750CLGEQ50xx
IBMPPC750CLGEQ60xx
IBMPPC750CLGEQ73xx
IBMPPC750CLGEQ80xx
IBMPPC750CLGEQ90xx
IBMPPC750CLGEQA0xx
0.90 V to 1.00 V
0.95 V to 1.05 V
1.00 V to 1.10 V
1.10 V to 1.20 V
1.10 V to 1.20 V
1.15 V to 1.25 V
1.24 V to 1.30 V
400
105
105
105
105
105
105
105
1.7
2.0
2.7
4.8
5.6
8.4
10.5
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
500
600
733
800
900
1000
Nap/Sleep
Maximum
IBMPPC750CLGEQ40xx
IBMPPC750CLGEQ50xx
IBMPPC750CLGEQ60xx
IBMPPC750CLGEQ73xx
IBMPPC750CLGEQ80xx
IBMPPC750CLGEQ90xx
IBMPPC750CLGEQA0xx
—
—
—
—
—
—
—
400
500
600
733
800
900
1000
50
50
50
50
50
50
50
0.95
1.00
1.05
1.15
1.15
1.20
1.27
0.4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
Nap/Sleep
Maximum
0.52
0.68
1.55
1.55
2.75
3.70
Nap/Sleep
Maximum
Nap/Sleep
Maximum
Nap/Sleep
Maximum
Nap/Sleep
Maximum
Nap/Sleep
Maximum
Notes:
1. These values apply for all valid 60× buses. The values do not include I/O supply power (OVDD) or PLL supply power (AVDD). OVDD
power is system dependent, but is typically less than 2% of VDD power.
2. For each part number, maximum power is measured at nominal VDD and at the indicated TJ and frequency, using parts with worst-
case process parameters and running RC5-72. RC5-72 runs hotter than typical production code, but it is possible to design code
that runs even hotter than RC5-72.
3. Previous IBM PowerPC processors specified the power dissipation of the processor without regard to the part number. In contrast,
the 750CL power dissipation specification is specific to a particular part number. Each power specification is specific to four condi-
tions: processor part number, processor actual operating frequency, processor actual junction temperature, and processor actual
VDD
.
4. VDD values are to be measured from KVDD to KGND.
3.2 AC Electrical Characteristics
This section provides the AC electrical characteristics for the 750CL. After fabrication, parts are sorted by
maximum processor core frequency as shown in Section 3.3, Clock Specifications, on page 25 and tested for
conformance to the AC specifications for that frequency. The processor core frequency is determined by the
bus (SYSCLK) frequency and the settings of the PLL configuration (PLL_CFG[0:4]) signals.
Electrical and Thermal Characteristics
Page 24 of 70
Version 2.5
December 2, 2008