IBM39STB032xx
IBM39STB034xx
Preliminary
STB032xx and STB034xx Digital Set-Top Box Integrated Controllers
SRAM Interface Timing
t1
Internal SYSCLK
Output
t3
t2
t4
t6
Output
BI_ADDRESS
BI_CS
VALID
t5
Output
t7
Output
BI_OE
t8
t9
Output
BI_WBE
BI_R/W
t10
t11
Output
TWT +1
t13
t12
BI_DATA
(to STB03xxx)
VALID
t15
Input
t14
BI_DATA
Output
(from STB03xxx)
SRAM Interface Timing Values
Symbol
Parameter
Min
Max
19.25
12
Units
T
T
T
T
T
T
T
T
T
At SYSCLK = 54 MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
3
4
5
6
7
8
9
Address output valid time
Address output hold time
Chip Select output valid time
Chip Select output hold time
3
3
3
3
12
12
12
12
Output Enable output valid time
Output Enable output hold time
Write Byte Enable output valid time
Write Byte Enable output hold time
Read/Write output valid time
Read/Write output hold time
Data input setup time
T
T
T
10
11
12
3
7
STB03_sds_041800.fm.01
April 18, 2000
Electrical Information
Page 39 of 55
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