IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
3.6 Interfacing Data Aligned Serial Link (DASL) Macro
3.6.1 Ingress Data Aligned Serial Link (DASL) Interface
The ingress DASL interface logic (IDI) is the interface between the ingress FIFO and the DASL macro. The
IDI feeds the DASL macro with data packets following a DASL packet request. When no packet is available to
serve the DASL, the IDI should provide an idle packet to the DASL macro. Data packets sent to the DASL
macro come from the ingress FIFO. The IDI is the packet clock provider to the output logic of the ingress
FIFO and to the DASL macro. The IDI also triggers the ingress FIFO output scheduler operation.
During the initial training sequence required to synchronize the remote switch DASL, the IDI provides
’synchronization packets’. The IDI is also designed to insert link liveness packets (liveness function covered
by yellow packets) into the flow of packets sent to the DASL box following a request from the control inter-
face. When data mode is activated, the IDI is fed with any data packet, otherwise it generates an idle packet
(lack of data packet). Idle packets carry CRC (one per LU) to protect logical unit transport media (IBM Packet
Routing Switch Serial Interface Converter and IBM 28.4 G Packet Routing Switch).
3.6.2 Functions
• Generate Idle Packet: no data available from ingress FIFO
• Generate Synchronization Packet (when DASL training sequence is being run)
• Generate Yellow Packet (when requested by control interface)
• Forward Data Packets
• LU protection CRC insert (within idle packets)
• Provide Packet Clock to ingress FIFO
• Provide Packet Request to ingress FIFO Output Scheduler
• DASL interface LU/Byte/Bit map compatible
3.6.3 Packets Format
3.6.3.1 Idle Packets
Idle packets are generated by IDI logic when no data packet is available from the ingress path. Idle packets
have the following format:
Master LU
Slave LU
Slave LU
Slave LU
PQ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
The Master LU must be routed to the switch operating as master.
Note: Yellow packets sent to the switch are considered idle packets and therefore contain CRC trailers.
3.6.3.2 Idle Packet CRC Computing
Idle packet CRC detects physical media errors, so 4x LUs must be covered. The last byte of every LU within
an idle packet carries a CRC byte protecting each LU.
The CRC polynom is X8+X4+X3+X2+1. CRC register is initialized (software configuration) depending on the
LU depth.
prssi.02.fm
Functional Description
Page 37 of 154
March 1, 2001