IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
Advance
3.6.4.1 Packets Format
Idle Packets
Idle packets received from EDI have the following format:
16x16 Switch Interface
Container
Master LU
Slave LU
Slave LU
Slave LU
C00
C01
C02
C03 C04 C05 C06 C07 C08 C09 C10 C11 C12 C13 C14 C15
PQ OQG1 OQG2 x’00’ x’00’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’00’ x’00’ x’00’ x’00’ CRC
x’CC’ x’00’
x’CC’ x’00’
x’CC’ x’00’
x’00’ x’00’ x’00’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’00’ x’00’ x’00’ x’00’ CRC
x’00’ x’00’ x’00’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’00’ x’00’ x’00’ x’00’ CRC
x’00’ x’00’ x’00’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’00’ x’00’ x’00’ x’00’ CRC
For idle packets PQ is mapped as follows:
Bit_ 0
Bit_1
Bit_2
Bit_3
Bit_4
Bit_5
Bit_6
Bit_7
00
01
10
11
Highest Priority
Header Parity
PQ OQG1
OQG2
00 (Blue Colored Packet)
01 (Red Colored Packet)
0
0
0
Lowest Priority
Flywheel Counter Synchronization
Parity Bit is EVEN parity over 3 bytes PQ, OQG1 and OQG2
32x32 SWITCH Interface
Master LU
Slave LU
Slave LU
Slave LU
PQ OQG1 OQG2 OQG3 0QG4 x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ x’CC’ CRC
In the packet qualifier the parity bit is EVEN parity over 5 bytes PQ, OQG1, OQG2, OQG3 and OQG4
Note: The content of PQ byte for yellow packets received from the switch is '01001000'. It does not contain
flywheel synchronization information because it is generated by the switch control. In the switch, egress yel-
low packets are considered data packets and therefore do not contain link CRC information fields. Yellow
packets are detected and an interruption is reported when the detection function is enabled. When detection
is disabled, the yellow packet is considered a normal time fill packet (idle packet).
Idle Packet CRC Computing
Idle packet CRC detects physical media errors, so the 4x LUs must be covered. The last byte of each LU for
each idle packet carries a CRC byte protecting each LU. The four LU CRC bytes are cumulative between two
idle packets.
The CRC polynom is X8+X4+X3+X2+1. The CRC register is initialized (configuration table address 08 @ 28,
bits 24-31) depending on the LU depth.
Functional Description
Page 40 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
