IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
4.1.1.38 Egress PE Setting Register (EGRESS_PE_INTERFACE - Transmit)
BM4_Pos_E
BM3_Pos_E
BM2_Pos_E
BM1_Pos_E
PQ_Pos_E
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reset Output Status (Power-on-Reset, PE reset)
Address in Word Mode
‘38432100’
x'C4’
Address in Byte Mode
x'C4 to C7’
Read/Write
Access Type
Bits /
Word
Bits /
Bytes
Name
Description
1
0
Force parity error on egress bus
Disable parity error insertion on the egress UTOPIA-3 interface
31
30
7
6
TX_FORCE_PERR
Egress PE interface parity enable
1
0
TXPRTY_enb_l
Enable assertion of the parity bit
Disable assertion of the parity bit
TXFULL vs. TXENB calibration up to four UTXCLK clock cycles.
00
01
10
11
1 UTXCLK cycle delay
2 UTXCLK cycle delay
3 UTXCLK cycle delay
29-28
5-4
late_TXFULL_l[1:0]
4 UTXCLK cycle delay (operates as described in the UTOPIA-3
document)
1
0
Enable the Converter to use TXFULL interface line
27
26
3
2
TxFULL_enb_l
Disable any action of TXFULL on the converter operation
Select the active level of TXFULL
TXFULL_PHASE_enb_l
1
0
Operate with TXFULL condition asserted as active high
Operate with the standard UTOPIA-3 TXFULL phase (active low)
25-24
23-20
1-0
7-4
Unused
Bit Map 4 byte position in packet
BM4_Pos_E
BM3_Pos_E
BM2_Pos_E
BM1_Pos_E
PQ_Pos_E
0100 Put OQG4 as first byte in second word of packet
Bit Map 3 byte position in packet
19-16
15-12
11-8
7-4
3-0
7-4
3-0
7-4
0011 Put OQG3 as forth byte in first word of packet
Bit Map 2 byte position in packet
0010 Put OQG2 as third byte in first word of packet
Bit Map 1 byte position in packet
0001 Put OQG1 as second byte in first word of packet
Packet Qualifier byte position in packet
0000 Put PQ as first byte in first word of packet
prssi.02.fm
Converter Configuration Table Registers
Page 103 of 154
March 1, 2001
IBM [ IBM ]
