PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
The following table provides DC electrical characteristics for the PID8p-750.
DC Electrical Specifications
See Section “Recommended Operating Conditions1,2,3,” on page 6, for operating conditions.
Characteristic
Symbol
VIH(3.3V)
VIH(2.5V)
VIH(1.8V)
VIL(3.3V)
VIL(2.5V)
VIL(1.8V)
CVIH(3.3V)
CVIH(2.5V)
CVIH(1.8V)
CVIL
Minimum
2.0
Maximum
3.465
2.625
1.89
0.8
Unit
Notes
1,2
Input high voltage (all inputs except SYSCLK)
V
V
V
1.75
1.4
Input low voltage (all inputs except SYSCLK)
SYSCLK input high voltage
GND
GND
GND
2.0
0.7
0.5
3.465
2.625
1.89
0.4
1
2.0
1.5
SYSCLK input low voltage
GND
–
V
µA
µA
V
Input leakage current, VIN = OVDD
Hi-Z (off state) leakage current, VIN = OVDD
Output high voltage, IOH = –6mA
Output high voltage, IOH = –6mA
Output high voltage, IOH = –3mA
Output low voltage, IOL = 6mA
Capacitance, VIN =0 V, f = 1MHz
Note:
IIN
20
1,2
1,2
ITSI
–
20
VOH(3.3V)
VOH(2.5V)
VOH(1.8V)
VOL(3.3V,2.5V,1.8V)
CIN
2.4
–
1.9
–
V
1.4
–
V
–
0.4
V
–
5.0
pF
2,3
1. For 60x bus signals, the reference is OVDD, while L2OVDD is the reference for the L2 bus signals.
2. Excludes test signals LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and IEEE 1149.1 signals.
3. Capacitance values are guaranteed by design and characterization, and are not tested.
Page 8
Version 2.0
Datasheet
9/30/99
IBM [ IBM ]
