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IBM25PPC750FL-GR0134T 参数 Datasheet PDF下载

IBM25PPC750FL-GR0134T图片预览
型号: IBM25PPC750FL-GR0134T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 600MHz, CMOS, PBGA292,]
分类和应用: 外围集成电路
文件页数/大小: 66 页 / 1860 K
品牌: IBM [ IBM ]
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Table 5-6. Input/Output Use (Sheet 3 of 4)  
750FL Micropro-  
Input/  
Input/Output with  
Internal  
Pullup Resistors  
Required  
External  
Resistor  
cessor Signal  
Name  
Active Level  
Usage Group  
Level Protect  
Comments  
Notes  
Output  
No resistor by  
design  
SYSCLK  
High  
Input  
Clock Control  
Keeper  
Keeper  
Active driver  
3, 4, 5  
3, 4, 5  
TA  
Low  
High  
Low  
Input  
Input  
Data Termination  
Active driver  
TBEN  
TBST  
Input/Output  
Transfer Attributes  
JTAG  
Keeper  
1, 3, 4  
5
External  
pulldown  
TCK  
High  
Input  
Not enabled  
Enabled high  
5k Ω to GND  
50 μA at 2.5 V  
25 μA at 1.8 V  
(the pullup current for the inter-  
nal resistor)  
Internal  
enabled  
TDI  
High  
Input  
JTAG  
5
TDO  
High  
Low  
Low  
Output  
Input  
JTAG  
Data Termination  
Control  
Keeper  
Keeper  
Keeper  
3, 4  
3, 4, 5  
3, 4  
TEA  
Active driver or pullup  
Must be actively driven  
TLBISYNC  
Input  
50 μA at 2.5 V  
25 μA at 1.8 V  
(the pullup current for the inter-  
nal resistor)  
Internal  
enabled  
TMS  
High  
Low  
Input  
Input  
JTAG  
JTAG  
Enabled high  
Enabled high  
5
50 μA at 2.5 V  
25 μA at 1.8 V  
(the pullup current for the inter-  
nal resistor)  
Internal  
enabled  
TRST  
2, 5  
TS  
Low  
Input/Output  
Output  
Address Start  
Keeper  
Keeper  
5k Ω  
Pullup required to OVDD  
3, 4, 5  
1, 3, 4  
TSIZ[0:2]  
Notes:  
High  
Transfer Attributes  
1. Depends on the system design. The electrical characteristics of the 750FL microprocessor do not add additional constraints to the system design. Therefore, whatever is  
done with the net depends on the system requirements.  
2. HRESET, SRESET, and TRST are signals used for ESP and RISCWatch to enable the correct operation of the debuggers. Logical AND gates must be placed between  
these signals and 750FL microprocessor. (See Figure 5-7 IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector on page 55.)  
3. The 750FL microprocessor provides protection from metastability on inputs through the use of a “keeper” circuit on specific inputs. See Section 5.5 Level Protection on  
page 55 for a more detailed description.  
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assure no metastability of  
inputs but do not guarantee a level).  
5. The 750FL microprocessor does not require external pullups on address and data lines. Control lines must be treated individually.  
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