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IBM25PPC750FL-GR0134T 参数 Datasheet PDF下载

IBM25PPC750FL-GR0134T图片预览
型号: IBM25PPC750FL-GR0134T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 600MHz, CMOS, PBGA292,]
分类和应用: 外围集成电路
文件页数/大小: 66 页 / 1860 K
品牌: IBM [ IBM ]
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Table 5-6. Input/Output Use (Sheet 2 of 4)  
750FL Micropro-  
Input/  
Input/Output with  
Internal  
Pullup Resistors  
Required  
External  
Resistor  
cessor Signal  
Name  
Active Level  
Usage Group  
Level Protect  
Comments  
Notes  
Output  
DH[0:31]  
High  
High  
High  
Low  
Low  
Input/Output  
Input/Output  
Input/Output  
Input  
Data Bus  
Data Bus  
Keeper  
Keeper  
1, 3, 4  
1, 3, 4  
DL[0:31]  
DP[0:7]  
DRTRY  
GBL  
Keeper  
Keeper  
3, 4  
Input/Output  
Transfer Attributes  
Power Supply  
Interrupt/Resets  
Interrupt/Resets  
LSSD  
1, 3, 4  
GND  
HRESET  
INT  
Low  
Low  
High  
High  
Low  
Low  
Input  
Input  
Input  
Input  
Input  
Input  
Keeper  
Keeper  
Active driver  
2, 3, 4, 5  
Active driver or pullup  
3, 4, 5  
L1_TSTCLK  
L2_TSTCLK  
LSSD_MODE  
MCP  
Not enabled  
Not enabled  
Not enabled  
5k Ω  
5k Ω  
5k Ω  
Pullup/pulldown, as required  
Pullup required to OVDD  
Pullup required to OVDD  
Active driver or pullup  
5
LSSD  
5
5
LSSD  
Interrupt/Resets  
Power Supply  
Clock Control  
Keeper  
3, 4, 5  
OVDD  
PLL_CFG[0:4]  
PLL_RNG[0:1]  
QACK  
High  
High  
Low  
Low  
Low  
Low  
Low  
Input  
Input  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
As required Pullup/pulldown, as required  
As required Pullup/pulldown, as required  
Must be actively driven  
3, 4, 5  
3, 4, 5  
3, 4, 5  
3, 4, 5  
3, 4, 5  
3, 4  
Input  
Control  
QREQ  
Output  
Output  
Input  
Status/Control  
Chip actively drives  
RSRV  
No connect  
SMI  
SRESET  
Notes:  
Input  
Interrupt/Resets  
Active driver or pullup  
2, 3, 4, 5  
1. Depends on the system design. The electrical characteristics of the 750FL microprocessor do not add additional constraints to the system design. Therefore, whatever is  
done with the net depends on the system requirements.  
2. HRESET, SRESET, and TRST are signals used for ESP and RISCWatch to enable the correct operation of the debuggers. Logical AND gates must be placed between  
these signals and 750FL microprocessor. (See Figure 5-7 IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector on page 55.)  
3. The 750FL microprocessor provides protection from metastability on inputs through the use of a “keeper” circuit on specific inputs. See Section 5.5 Level Protection on  
page 55 for a more detailed description.  
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assure no metastability of  
inputs but do not guarantee a level).  
5. The 750FL microprocessor does not require external pullups on address and data lines. Control lines must be treated individually.  
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