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IBM25PPC750FL-GR0134T 参数 Datasheet PDF下载

IBM25PPC750FL-GR0134T图片预览
型号: IBM25PPC750FL-GR0134T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 600MHz, CMOS, PBGA292,]
分类和应用: 外围集成电路
文件页数/大小: 66 页 / 1860 K
品牌: IBM [ IBM ]
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Table 5-6. Input/Output Use (Sheet 1 of 4)  
750FL Micropro-  
Input/  
Input/Output with  
Internal  
Pullup Resistors  
Required  
External  
Resistor  
cessor Signal  
Name  
Active Level  
Usage Group  
Level Protect  
Comments  
Notes  
Output  
A1VDD  
Power Supply  
Power Supply  
A2VDD  
A[0:31]  
AACK  
ABB  
High  
Low  
Low  
Input/Output  
Input  
Address Bus  
Keeper  
Keeper  
Keeper  
1, 3, 4  
3, 4, 5  
3, 4, 5  
Address Termination  
Must be actively driven  
Pullup required to OVDD  
Input/Output  
5k Ω  
5k Ω  
AGND  
AP[0:3]  
ARTRY  
BG  
Power Supply  
High  
Low  
Low  
Low  
N/A  
Input/Output  
Input/Output  
Input  
Keeper  
Keeper  
Keeper  
Keeper  
3, 4  
3, 4, 5  
3, 4, 5  
3, 4, 5  
5
Address Termination  
Address Arbitration  
Address Arbitration  
Input/Output Level  
Interrupt/Resets  
Pullup required to OVDD  
Active driver or pulldown  
Chip actively drives  
BR  
Output  
Input  
BVSEL  
CHECKSTOP  
CI  
5k Ω  
5k Ω  
Pullup/pulldown, as required  
Pullup required to OVDD  
Low  
Low  
Low  
High  
Low  
Low  
Low  
Low  
Output  
Output  
Input  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
Keeper  
3, 4, 5  
1, 3, 4  
3, 4, 5  
3, 4  
Transfer Attributes  
Interrupt/Resets  
CKSTP_IN  
CLK_OUT  
DBB  
Must be actively driven  
Pullup required to OVDD  
Active driver or tie low  
Output  
Input/Output  
Input  
5k Ω  
3, 4, 5  
3, 4  
DBDIS  
DBG  
Input  
Data Arbitration  
3, 4, 5  
3, 4  
DBWO  
Notes:  
Input  
1. Depends on the system design. The electrical characteristics of the 750FL microprocessor do not add additional constraints to the system design. Therefore, whatever is  
done with the net depends on the system requirements.  
2. HRESET, SRESET, and TRST are signals used for ESP and RISCWatch to enable the correct operation of the debuggers. Logical AND gates must be placed between  
these signals and 750FL microprocessor. (See Figure 5-7 IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector on page 55.)  
3. The 750FL microprocessor provides protection from metastability on inputs through the use of a “keeper” circuit on specific inputs. See Section 5.5 Level Protection on  
page 55 for a more detailed description.  
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assure no metastability of  
inputs but do not guarantee a level).  
5. The 750FL microprocessor does not require external pullups on address and data lines. Control lines must be treated individually.