PowerPC 440GP Embedded Processor Data Sheet
Peripheral Interface Clock Timings
Parameter
PCIXClk input frequency (asynchronous mode)
PCIXClk period (asynchronous mode)
PCIXClk input high time
Min
Max
Units
MHz
ns
Notes
–
133.33
2
7.5
–
40% of nominal period
60% of nominal period
ns
PCIXClk input low time
40% of nominal period
60% of nominal period
ns
EMCMDClk output frequency
EMCMDClk period
–
2.5
MHz
ns
400
–
EMCMDClk output high time
EMCMDClk output low time
EMCTxClk input frequency MII(RMII)
EMCTxClk period MII(RMII)
EMCTxClk input high time
160
–
ns
160
–
ns
2.5(5)
25(50)
MHz
ns
40(20)
400(200)
35% of nominal period
–
ns
EMCTxClk input low time
35% of nominal period
–
25(50)
400(200)
–
ns
EMCRxClk input frequency MII(RMII)
EMCRxClk period MII(RMII)
EMCRxClk input high time
EMCRxClk input low time
2.5(5)
MHz
ns
40(20)
35% of nominal period
ns
35% of nominal period
–
ns
GMCRefClk input frequency
GMCRefClk period
–
125
MHz
ns
8
GMCRefClk input high time
GMCRefClk input low time
PerClk output frequency (for ext. master or sync. slaves)
PerClk period
47% of nominal period
47% of nominal period
–
53% of nominal period
53% of nominal period
66.66
ns
ns
MHz
ns
15
–
PerClk output high time
50% of nominal period
33% of nominal period
66% of nominal period
50% of nominal period
ns
PerClk output low time
ns
1000/(2TOPB1+2ns)
UARTSerClk input frequency
UARTSerClk period
–
MHz
ns
1
1
1
1
2TOPB+2
–
–
T
OPB+1
UARTSerClk input high time
ns
TOPB+1
UARTSerClk input low time
TmrClk input frequency
TmrClk period
–
ns
MHz
ns
–
100
10
–
TmrClk input high time
TmrClk input low time
Notes:
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
1. TOPB is the period in ns of the OPB clock. The internal OPB clock runs at 1/2the frequency of the PLB clock. The
maximum OPB clock frequency is 66.66 MHz.
2. When the PCI-X interface is used to support a legacy PCI interface, the maximum PCIXClk frequency is 66.66MHz.
Page 55 of 72
5/13/04
IBM [ IBM ]
