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IBM25PPC405CR-3BB200C 参数 Datasheet PDF下载

IBM25PPC405CR-3BB200C图片预览
型号: IBM25PPC405CR-3BB200C
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 200MHz, CMOS, PBGA316, 27 MM, PLASTIC, BGA-316]
分类和应用: 外围集成电路
文件页数/大小: 42 页 / 565 K
品牌: IBM [ IBM ]
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PowerPC 405CR Embedded Controller Data Sheet  
Signal Functional Description (Part 3 of 6)  
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.  
Notes:  
1. Receiver input has hysteresis  
2. Must pull up (recommended value is 3kto 3.3V, 10kto 5V)  
3. Must pull down (recommended value is 1k)  
4. If not used, must pull up (recommended value is 3kto 3.3V)  
5. If not used, must pull down (recommended value is 1k)  
6. Strapping input during reset; pull-up or pull-down required  
Signal Name  
Description  
I/O  
Type  
Notes  
External MASTER Peripheral Interface  
Peripheral clock to be used by an external master and by  
synchronous peripheral slaves  
5V tolerant  
3.3V LVTTL  
PerClk  
ExtReset  
HoldReq  
HoldAck  
ExtReq  
ExtAck  
O
O
I
Peripheral reset to be used by an external master and by  
synchronous peripheral slaves  
5V tolerant  
3.3V LVTTL  
Hold Request, used by an external master to request ownership  
of the peripheral bus  
5V tolerant  
Rcvr  
1, 5  
6
Hold Acknowledge, used by the PPC405CR to transfer  
ownership of peripheral bus to an external master  
5V tolerant  
3.3V LVTTL  
O
I
ExtReq is used by an external master to indicate it is prepared to  
transfer data  
5V tolerant  
Rcvr  
1, 4  
6
ExtAck is used by the PPC405CR to indicate that a data transfer  
occurred.  
5V tolerant  
3.3V LVTTL  
O
I
Used by an external master to indicate the priority of a given  
transfer (0 = high, 1 = low)  
5V tolerant  
Rcvr  
HoldPri  
BusReq  
PerErr  
1, 4  
Used when the PPC405CR needs to regain control of peripheral  
interface from an external Master  
5V tolerant  
3.3V LVTTL  
O
I
Used as an input used to record external Master errors and  
external slave peripheral errors  
5V tolerant  
Rcvr  
1, 5  
1, 4  
Internal Peripheral Interface  
Serial Clock used to provide an alternative clock to the internally  
generated serial clock. Used in cases where the allowable  
internally generated baud rates are not satisfactory. This input  
can be individually connected to either UART.  
5V tolerant  
3.3V LVTTL  
UARTSerClk  
I
5V tolerant  
3.3V LVTTL  
UART0_Rx  
UART0_Tx  
UART0 Serial Data In  
I
O
I
1, 4  
6
5V tolerant  
3.3V LVTTL  
UART0 Serial Data Out  
UART0 Data Carrier Detect  
UART0 Data Set Ready  
UART0 Clear To Send  
5V tolerant  
3.3V LVTTL  
UART0_DCD  
UART0_DSR  
UART0_CTS  
UART0_DTR  
UART0_RTS  
1, 4  
1, 4  
1, 4  
6
5V tolerant  
3.3V LVTTL  
I
5V tolerant  
3.3V LVTTL  
I
5V tolerant  
3.3V LVTTL  
UART0 Data Terminal Ready  
UART0 Request To Send  
O
O
5V tolerant  
3.3V LVTTL  
6
5V tolerant  
3.3V LVTTL  
Rcvr  
UART0_RI  
UART0 Ring Indicator  
I
1, 4  
26  
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