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IBM25PPC405CR-3BB200C 参数 Datasheet PDF下载

IBM25PPC405CR-3BB200C图片预览
型号: IBM25PPC405CR-3BB200C
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 200MHz, CMOS, PBGA316, 27 MM, PLASTIC, BGA-316]
分类和应用: 外围集成电路
文件页数/大小: 42 页 / 565 K
品牌: IBM [ IBM ]
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PowerPC 405CR Embedded Controller Data Sheet  
Pin Lists  
The PPC405CR embedded controller is packaged in a 456-ball enhanced plastic ball grid array (E-PBGA).  
The following tables describe the package level pinout.  
Pin Summary  
Group  
No. of Pins  
SDRAM  
71  
97  
9
External Peripheral  
External Master  
Internal Peripheral  
Interrupts  
15  
7
JTAG  
5
System  
18  
222  
1
Total Signal Pins  
AV  
DD  
OV  
16  
DD  
V
16  
40  
16  
5
DD  
Gnd  
Thermal (and Gnd)  
Reserved  
Total Pins  
316  
In the table “Signal Functional Description” on page 24, each I/O signal is listed along with a short description  
of the signal function. Some signals are multiplexed onto the same pin (ball) so that the pin is usable for  
different functions. Multiplexed signals are shown in square brackets following the default signal (for example,  
C0:3[BE0:3]) and described consecutively within each pin functional description. Active-low signals such as  
BE0:3 are marked with an overline.  
It is expected that in any single application a particular pin will always be programmed to serve the same  
function. The flexibility of multiplexing allows a single chip to offer a richer pin selection than would otherwise  
be possible.  
In addition to multiplexing, many pins are also multi-purpose. These pins are described in the table using a  
single row with a text description that indicates the different functional uses of the pin. For example, the EBC  
peripheral controller address pins are used as outputs by the PPC405CR to broadcast an address to external  
slave devices when the PPC405CR has control of the external bus. When during the course of normal chip  
operation an external master gains ownership of the external bus, these same pins are used as inputs which  
are driven by the external master and received by the EBC in the PPC405CR.  
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs  
only during reset and are used for other functions during normal operation (see “Strapping” on page 39). Note  
that these are not multiplexed pins since the function of the pins is not programmable.  
The following table lists all of the I/O signals provided by the PPC405CR. Please refer to “Signals Listed  
Alphabetically” on page 13 for the pin number to which each signal is assigned.  
23