Table 14. Pinout Listing for the 255 CBGA Package (Continued)
Signal Name
Pin Number
Active
High
High
Low
I/O
Input
Input
Input
1
D11
D12
B10
C13
L1_TSTCLK
1
L2_TSTCLK
1
LSSD_MODE
MCP
Low
—
Input
—
NC (No-Connect)
B07, B08, C03, C06, C08, D05, D06, H04, J16, A04, A05, A02,
A03, B01, B05
OVDD
C07, E05, E07, E10, E12, G03, G05, G12, G14, K03,
K05, K12, K14, M05, M07, M10, M12, P07, P10
—
—
PLL_CFG[0-3]
QACK
QREQ
RSRV
SMI
A08, B09, A09, D09
High
Low
Low
Low
Low
Low
—
Input
Intput
Output
Output
Input
Input
Input
Input
Input
I/O
D03
J03
D01
A16
SRESET
SYSCLK
TA
B14
C09
H14
Low
High
Low
High
High
High
Low
Low
High
Low
Low
High
High
Low
—
TBEN
TBST
C02
A14
TCK
C11
Input
Input
Output
Input
Input
Input
Input
I/O
TDI
A11
TDO
A12
TEA
H13
TLBISYNC
TMS
C04
B11
TRST
C10
TS
J13
TSIZ0-TSIZ2
TT0-TT4
WT
A13, D10, B12,
B13, A15, B16, C14, C15
D02
Output
I/O
Output
—
2
F06, F08, F09, F11, G07, G10, H06, H08, H09, H11, J06,
J08, J09, J11, K07, K10, L06, L08, L09, L11
VDD
3
F03
Low
Output
VOLTDET
23 of 43
PPC740 and PPC750 Hardware Specifications
Preliminary and subject to change without notice
IBM [ IBM ]
