Datasheet
CPC945 Bridge and Memory Controller
Preliminary
Table 4-17. CPC945 Bridge and Memory Controller Pin List by Grid Position (Page 4 of 12)
Grid Position
H03
H04
K07
K08
K09
K10
K11
K12
K13
K14
K15
K16
K17
K18
K19
K20
K21
K22
K23
K24
K25
K26
K27
K28
K29
K30
K31
K32
K33
K34
K35
K36
L01
Signal Name
PCIE_HSON5
Grid Position
J04
Signal Name
PCIE_HSIP5
Grid Position
K05
Signal Name
#VD2
#VDD
J05
PCIE_HSIN5
PI0_ADI35
PI0_ADI31
PI0_ADI34
#VDD
K06
PI0_ADI32
PI0_ADI39
#VD2
#GND
L08
L09
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
L31
L32
L33
L34
L35
L36
M01
M02
M03
M04
M05
M06
M09
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M26
M27
M28
M29
M30
M31
M32
M33
M34
M35
M36
N01
#VD2
PI0_ADI33
#GND
#GND
#VDD
depop
#GND
#GND
depop
depop
#GND
#VD4
#VDD
PCIE_REFCLK_AGNDB
#VDD
PCIE_REFCLK_AVDDB
#GND
HT_REFCLK_AGND
#GND
HT_REFCLK_AVDD
#VD4
HT_PVTREF0
#VD4
depop
depop
#GND
#VD4
HT_PVTREF1
#GND
HT_PVTREF3
#GND
HT_PVTREF2
#VD4
HT_CAD_TXP7
#VDD
depop
depop
#VD3
HT_CAD_TXN7
#GND
HT_CAD_RXP12
#GND
HT_CAD_RXN12
#VDD
#GND
HT_CAD_RXN4
#VD3
DDR_VREF_12_13
DDR_DQ88
DDR_CS11
DDR_ODT7
DDR_DQ140
DDR_DQ86
DDR_CS10
DDR_DQ87
DDR_DQ81
DDR_DQSN10
DDR_DQSP10
PI0_ADI16
HT_CAD_RXP4
#GND
#GND
HT_CTL_RXP0
depop
DDR_DQ141
#VD3
DDR_DQ142
DDR_DQ143
DDR_DQ137
DDR_DQSP17
DDR_DQSN17
DDR_DQ138
DDR_DQ82
DDR_DQ80
PI0_ADI28
PI0_ADI29
PI0_ADI30
PI0_BCLKIP
PI0_BCLKIN
#GND
DDR_DQ84
#VD3
#GND
DDR_DQ85
#VD3
#GND
#VD2
N02
PI0_ADI17
#GND
N03
PI0_ADI18
L02
PI0_ADI22
#VD2
N04
PI0_ADI19
L03
N05
PI0_ADI27
L04
#GND
N06
PI0_ADI26
L05
PI0_ADI23
N07
PI0_ADI25
A15-6009-03
December 18, 2007 - IBM Confidential
Page 60 of 69
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