Datasheet
Preliminary
CPC945 Bridge and Memory Controller
Table 4-17 shows the processor pin numbers and their associated signal names, sorted by pin number.
Signal names shown as depop are depopulated grid sites having no solder ball.
Table 4-17. CPC945 Bridge and Memory Controller Pin List by Grid Position (Page 1 of 12)
Grid Position
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
Signal Name
Grid Position
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
Signal Name
Grid Position
C01
C02
C03
C04
C05
C06
C07
C08
C09
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
Signal Name
PCIE_HSON2
depop
depop
depop
#GND
PCIE_HSOP2
#VDD
PCIE_HSON6
#VDD
PCIE_HSOP6
#GND
PCIE_HSIN2
PCIE_HSON7
#GND
PCIE_HSOP7
#VDD
PCIE_HSIP2
PCIE_HSIP3
PCIE_HSON3
#VDD
PCIE_HSOP3
#GND
PCIE_HSIN3
PCIE_HSON15
PCIE_HSOP15
PCIE_HSOP8
PCIE_HSON8
PCIE_HSIP13
PCIE_HSIN13
HT_CAD_TXP14
HT_CAD_TXN14
HT_CLK_TXN1
HT_CLK_TXP1
HT_CAD_TXP10
HT_CAD_TXN10
HT_CAD_TXN15
HT_CAD_TXP15
HT_CAD_RXN11
HT_CAD_RXP11
HT_CAD_RXN15
HT_CAD_RXP15
HT_CAD_RXN7
HT_CAD_RXP7
DDR_DQ127
PCIE_HSOP11
#GND
PCIE_HSON11
#VDD
PCIE_HSOP9
#VDD
PCIE_HSON9
#GND
PCIE_HSOP13
#GND
PCIE_HSON13
#VD4
HT_CAD_TXN11
#VD4
HT_CAD_TXP11
#GND
HT_CAD_TXN12
#GND
HT_CAD_TXP12
#VD4
HT_CAD_TXP13
#VD4
HT_CAD_TXN13
#GND
HT_CAD_RXN14
#GND
HT_CAD_RXP14
#VDD
HT_CAD_RXN9
#VDD
HT_CAD_RXP9
#GND
HT_CAD_RXN2
#GND
HT_CAD_RXP2
#VDD
DDR_DQSN15
#VD3
DDR_DQSP15
#GND
DDR_DQ126
#GND
DDR_DQ125
#VD3
DDR_DQ124
DDR_DQ119
DDR_DQSP14
#VD3
DDR_DQSN14
#GND
DDR_DQ114
DDR_DQ118
DDR_DQ116
#GND
DDR_DQ117
#VD3
DDR_DQ106
DDR_DQ108
A15-6009-03
December 18, 2007 - IBM Confidential
Page 57 of 69
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