IBM11M4730H
IBM11M4730HB
4M x 72 DRAM MODULE
Read Cycle
-60
-70
Symbol
Parameter
Unit
Notes
Min
—
—
—
—
2
Max
60
20
35
20
—
—
—
—
—
—
—
—
—
20
—
20
Min
—
—
—
—
2
Max
70
25
40
25
—
—
—
—
—
—
—
—
—
20
—
20
tRAC
tCAC
tAA
Access Time from RAS
Access Time from CAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1, 2
1, 2
1, 2
1, 2
Access Time from Address
Access Time from OE
tOEA
tRCS
tRCH
tRRH
tRAL
tCAL
tCLZ
tROH
tOH
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
2
2
3
3
0
0
35
35
2
40
40
2
RAS Hold to Output Enable
Output Data Hold Time
—
2
—
2
4
tOHO
tOEZ
tCDD
tOFF
Output Data Hold Time from OE
Output Buffer Turn-off Delay from OE
CAS to DIN Delay Time
2
2
2
2
5
6
20
2
20
2
Output Buffer Turn-off delay
1. Measured with the specified current load and 100pF.
2. Access time is determined by the latter of tRAC, tCAC, tCPA, tAA, tOEA
3. Either tRHC or tRRH must be satisfied.
.
4. This timing parameter is not applicable to this product, but applies to a related product in this family.
5. tOFF (max) and tOEZ (max) define the time at which the output achieves the open circuit condition and is not referenced to output
voltage levels.
6. Either tCDD or tODD must be satisfied.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
54H8529
SA14-4637-01
Released 3/96
Page 9 of 26
IBM [ IBM ]
