IBM11M4730H
IBM11M4730HB
4M x 72 DRAM MODULE
Write Cycle
-60
-70
Symbol
Parameter
Write Command Set Up Time
Unit
Notes
1
Min
2
Max
—
—
—
—
—
—
—
—
—
Min
2
Max
—
—
—
—
—
—
—
—
—
tWCS
tWCH
tWP
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Command Hold Time
Write Command Pulse Width
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Write Command Hold Time Referenced to RAS
Data Hold Time Referenced to RAS
DIN Setup Time
17
15
20
17
—
—
-2
17
15
25
22
—
—
-2
tRWL
tCWL
tWCR
tDHR
tDS
2
2
3
3
tDH
DIN Hold Time
17
20
1. tWCS, tRWD, tCWD, tAWD, and tCPW are not restrictive parameters. They are included in the data sheet as electrical characteristics
only. If tWCS ≥ tWCS(min.), the entire cycle is an early write cycle and the data pin will remain open circuit (high impedance) through
the entire cycle; If tRWD ≥ tRWD(min.), tCWD ≥ tCWD(min.), tAWD ≥ tAWD(min.) and tCPW ≥ tCPW(min.)(Fast Page Mode), the cycle is a
Read-Modify-Write cycle and the data will contain read from the selected cell: If neither of the above sets of conditions are met, the
condition of the data (at access time) is indeterminate.
2. This timing parameter is not applicable to this product, but applies to a related product in this family.
3. Data-in set-up and hold is measured from the latter of the two timings, CAS or WE.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
54H8529
SA14-4637-01
Released 3/96
Page 8 of 26
IBM [ IBM ]
