IBM0625164GT3B IBM0625404GT3B
IBM06254B4GT3B IBM0625804GT3B
Advance
256Mb Double Data Rate Synchronous DRAM
Capacitance
Parameter
Symbol
Min.
2.5
Max.
3.5
Units
pF
Notes
Input Capacitance: CK, CK
CI
1
1
1
2
Input Capacitance: All other input-only pins (except DM)
Input/Output Capacitance: DQ, DQS, DM
Output Capacitance: QFC
CI
2.5
3.5
pF
C
4.0
5.5
pF
1, 2
1
IO
CO
TBD
TBD
pF
1
1. V
= V = 2.5V 0.2V, f = 100MHz, T = 25°C, V
(DC) = V
,
DDQ/2
DDQ
DD
A
OUT
VOUT (Peak to Peak) = 0.2V.
2. DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching
at the board level.
Electrical Characteristics and DC Operating Conditions
(0˚C ≤ TA ≤ 70°C; VDDQ = 2.5V ± 0.2V, VDD = + 2.5V ± 0.2V, see AC Characteristics)
Symbol
Parameter
Min
2.3
2.3
Max
2.7
Units
V
Notes
V
Supply Voltage
1
1
DD
V
I/O Supply Voltage
2.7
V
DDQ
Supply Voltage
I/O Supply Voltage
V
, V
0
0
V
SS
SSQ
V
I/O Reference Voltage
1.15
1.35
V
V
V
V
V
V
1, 2
1, 3
1
REF
V
I/O Termination Voltage (System)
Input High (Logic1) Voltage
V
V
− 0.04
V
V
+ 0.04
REF
TT
REF
REF
V
+ 0.18
V
+ 0.3
DDQ
IH(DC)
V
Input Low (Logic0) Voltage
− 0.3
− 0.18
REF
1
IL(DC)
IN(DC)
ID(DC)
V
V
Input Voltage Level, CK and CK Inputs
Input Differential Voltage, CK and CK Inputs
Input Leakage Current
− 0.3
V
+ 0.3
+ 0.6
1
DDQ
DDQ
0.36
V
1, 4
I
Any input 0V ≤ V ≤ V
− 5
5
µA
1
I
IN
DD
(All other pins not under test = 0V)
Output Leakage Current
(DQs are disabled; 0V ≤ V ≤ V
I
− 5
− 15.2
15.2
5
µA
mA
mA
1
1
1
OZ
out
DDQ
Output High Current
(VOUT = 1.95V)
I
OH
Output Low Current
(VOUT = 0.35V)
I
OL
1. Inputs are not recognized as valid until VREF stabilizes.
2. VREF is expected to be equal to 0.5 VDDQ of the transmitting device, and to track variations in the DC level of the
same. Peak-to-peak noise on VREF may not exceed 2% of the DC value.
3. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set
equal to VREF, and must track variations in the DC level of VREF
.
4. VID is the magnitude of the difference between the input level on CK and the input level on CK.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
29L0011.E36997
10/99
Page 51 of 75
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