Discontinued (12/98 - last order; 9/99 last ship)
IBM0316409C IBM0316809C IBM0316169C
IBM03164B9C
16Mb Synchronous DRAM-Die Revision D
Burst Write followed by Precharge Command (Burst Length = 2, CAS Latency = 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
CLK
Activate
Bank Ax
NOP
NOP
Precharge A
NOP
NOP
NOP
NOP
COMMAND
WRITE Ax
0
tDPL
tRP
tDAL
CAS latency=3
tCK3, DQs
(-80, -10)
*
DIN Ax
DIN Ax
1
0
Activate
Bank Ax
NOP
NOP
NOP
Precharge A
NOP
NOP
NOP
WRITE Ax
COMMAND
0
tDPL
tDAL
tRP
*
CAS latency=3
tCK3, DQs
(-360)
DIN Ax
DIN Ax
0
1
Bank can be reactivated at completion of tDAL (tDPL + tRP).
*
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
08J3348.E35853
5/98
Page 28 of 120
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